JPS61173519A - 出力回路 - Google Patents

出力回路

Info

Publication number
JPS61173519A
JPS61173519A JP60014061A JP1406185A JPS61173519A JP S61173519 A JPS61173519 A JP S61173519A JP 60014061 A JP60014061 A JP 60014061A JP 1406185 A JP1406185 A JP 1406185A JP S61173519 A JPS61173519 A JP S61173519A
Authority
JP
Japan
Prior art keywords
transistor
type
circuit
control signal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60014061A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0462499B2 (enrdf_load_html_response
Inventor
Munehiro Uratani
浦谷　宗宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP60014061A priority Critical patent/JPS61173519A/ja
Publication of JPS61173519A publication Critical patent/JPS61173519A/ja
Publication of JPH0462499B2 publication Critical patent/JPH0462499B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic
    • H03K19/09429—Multistate logic one of the states being the high impedance or floating state

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
JP60014061A 1985-01-28 1985-01-28 出力回路 Granted JPS61173519A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60014061A JPS61173519A (ja) 1985-01-28 1985-01-28 出力回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60014061A JPS61173519A (ja) 1985-01-28 1985-01-28 出力回路

Publications (2)

Publication Number Publication Date
JPS61173519A true JPS61173519A (ja) 1986-08-05
JPH0462499B2 JPH0462499B2 (enrdf_load_html_response) 1992-10-06

Family

ID=11850571

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60014061A Granted JPS61173519A (ja) 1985-01-28 1985-01-28 出力回路

Country Status (1)

Country Link
JP (1) JPS61173519A (enrdf_load_html_response)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6380621A (ja) * 1986-09-24 1988-04-11 Nec Ic Microcomput Syst Ltd ３−ステ−ト回路
JPH03230618A (ja) * 1990-02-05 1991-10-14 Nec Corp 出力バッファ回路
WO2017169558A1 (ja) * 2016-03-31 2017-10-05 ザインエレクトロニクス株式会社 信号多重化装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5376719A (en) * 1976-12-20 1978-07-07 Fujitsu Ltd Output buffer circuit with tri-state control

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5376719A (en) * 1976-12-20 1978-07-07 Fujitsu Ltd Output buffer circuit with tri-state control

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6380621A (ja) * 1986-09-24 1988-04-11 Nec Ic Microcomput Syst Ltd ３−ステ−ト回路
JPH03230618A (ja) * 1990-02-05 1991-10-14 Nec Corp 出力バッファ回路
WO2017169558A1 (ja) * 2016-03-31 2017-10-05 ザインエレクトロニクス株式会社 信号多重化装置
US10868531B2 (en) 2016-03-31 2020-12-15 Thine Electronics, Inc. Signal-multiplexing device

Also Published As

Publication number Publication date
JPH0462499B2 (enrdf_load_html_response) 1992-10-06

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