JPS61158163A - バンプの形成方法 - Google Patents

バンプの形成方法

Info

Publication number
JPS61158163A
JPS61158163A JP59275493A JP27549384A JPS61158163A JP S61158163 A JPS61158163 A JP S61158163A JP 59275493 A JP59275493 A JP 59275493A JP 27549384 A JP27549384 A JP 27549384A JP S61158163 A JPS61158163 A JP S61158163A
Authority
JP
Japan
Prior art keywords
chip
electrode pad
paint
conductive powder
aluminum electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59275493A
Other languages
English (en)
Japanese (ja)
Other versions
JPH033384B2 (enExample
Inventor
Kazuyuki Shimada
和之 嶋田
Hiroshi Takahashi
弘 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59275493A priority Critical patent/JPS61158163A/ja
Publication of JPS61158163A publication Critical patent/JPS61158163A/ja
Publication of JPH033384B2 publication Critical patent/JPH033384B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP59275493A 1984-12-29 1984-12-29 バンプの形成方法 Granted JPS61158163A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59275493A JPS61158163A (ja) 1984-12-29 1984-12-29 バンプの形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59275493A JPS61158163A (ja) 1984-12-29 1984-12-29 バンプの形成方法

Publications (2)

Publication Number Publication Date
JPS61158163A true JPS61158163A (ja) 1986-07-17
JPH033384B2 JPH033384B2 (enExample) 1991-01-18

Family

ID=17556274

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59275493A Granted JPS61158163A (ja) 1984-12-29 1984-12-29 バンプの形成方法

Country Status (1)

Country Link
JP (1) JPS61158163A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63181450A (ja) * 1987-01-23 1988-07-26 Matsushita Electric Ind Co Ltd 半導体素子用バンプ及びその製造方法
JPS6411235A (en) * 1987-07-03 1989-01-13 Matsushita Electric Industrial Co Ltd Semiconductor element
JP2001237268A (ja) * 2000-02-22 2001-08-31 Nec Corp 半導体素子の実装方法及び製造装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63181450A (ja) * 1987-01-23 1988-07-26 Matsushita Electric Ind Co Ltd 半導体素子用バンプ及びその製造方法
JPS6411235A (en) * 1987-07-03 1989-01-13 Matsushita Electric Industrial Co Ltd Semiconductor element
JP2001237268A (ja) * 2000-02-22 2001-08-31 Nec Corp 半導体素子の実装方法及び製造装置

Also Published As

Publication number Publication date
JPH033384B2 (enExample) 1991-01-18

Similar Documents

Publication Publication Date Title
US7112524B2 (en) Substrate for pre-soldering material and fabrication method thereof
US5633535A (en) Spacing control in electronic device assemblies
US5336547A (en) Electronic components mounting/connecting package and its fabrication method
EP1445995B1 (en) Method of mounting an electronic component on a circuit board and system for carrying out the method
US6060373A (en) Method for manufacturing a flip chip semiconductor device
US20070127224A1 (en) Electronic circuit device and method of manufacturing the same
JPH1027868A (ja) 半導体パッケージ及びその製造方法
JPH0128502B2 (enExample)
JPH0273648A (ja) 電子回路及びその製造方法
US6946601B1 (en) Electronic package with passive components
KR100304396B1 (ko) 반도체제조공정에서의평탄화를위한덴드라이트상호접속부재와그제조방법
JPH031828B2 (enExample)
JPH05218137A (ja) 半導体装置の製造方法
JPS61158163A (ja) バンプの形成方法
KR20030069321A (ko) 플립칩 범핑을 이용한 반도체 촬상소자 패키지 및 그제조방법
JPH09306231A (ja) 導電性微粒子及び基板
US6960518B1 (en) Buildup substrate pad pre-solder bump manufacturing
JP2538605B2 (ja) 電子部品の製造方法
JP2003023034A (ja) フリップチップ実装方法
JP2511909B2 (ja) 電気的接続材料のマイクロ形成方法
JPH0334651B2 (enExample)
JP2541284B2 (ja) 半導体チップの実装方法
JPH0918121A (ja) 電子部品実装体及びその製造方法
JP2501882B2 (ja) 電子部品の電極形成方法
JPH05326628A (ja) フリップチップの実装方法

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term