JPS61156851A - 集積回路 - Google Patents

集積回路

Info

Publication number
JPS61156851A
JPS61156851A JP60289558A JP28955885A JPS61156851A JP S61156851 A JPS61156851 A JP S61156851A JP 60289558 A JP60289558 A JP 60289558A JP 28955885 A JP28955885 A JP 28955885A JP S61156851 A JPS61156851 A JP S61156851A
Authority
JP
Japan
Prior art keywords
capacitors
capacitor
row
rows
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60289558A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0455342B2 (enExample
Inventor
アーノルダス・ヨハネス・ユリアナ・ボウデウエインス
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of JPS61156851A publication Critical patent/JPS61156851A/ja
Publication of JPH0455342B2 publication Critical patent/JPH0455342B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/206Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of combinations of capacitors and resistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0675Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
    • H03M1/0678Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • H03M1/74Simultaneous conversion
    • H03M1/80Simultaneous conversion using weighted impedances
    • H03M1/802Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices
    • H03M1/804Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices with charge redistribution
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/925Bridge rectifier module

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
JP60289558A 1984-12-24 1985-12-24 集積回路 Granted JPS61156851A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8403932A NL8403932A (nl) 1984-12-24 1984-12-24 Geintegreerde schakeling met kapaciteiten van verschillende kapaciteitswaarden.
NL8403932 1984-12-24

Publications (2)

Publication Number Publication Date
JPS61156851A true JPS61156851A (ja) 1986-07-16
JPH0455342B2 JPH0455342B2 (enExample) 1992-09-03

Family

ID=19844966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60289558A Granted JPS61156851A (ja) 1984-12-24 1985-12-24 集積回路

Country Status (7)

Country Link
US (1) US4929998A (enExample)
EP (1) EP0186239B1 (enExample)
JP (1) JPS61156851A (enExample)
CN (1) CN1003067B (enExample)
CA (1) CA1241454A (enExample)
DE (1) DE3582231D1 (enExample)
NL (1) NL8403932A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004505485A (ja) * 2000-07-21 2004-02-19 セミコンダクタ アイディアズ ツー ザ マーケット(アイ ティ オー エム) デジタル制御キャパシタバンクを有する受信機
US8558238B2 (en) 2006-06-01 2013-10-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2245419A (en) * 1990-06-20 1992-01-02 Philips Electronic Associated Ratioed capacitances in integrated circuits
FR2714528B1 (fr) * 1993-12-27 1996-03-15 Sgs Thomson Microelectronics Structure de test de circuit intégré.
EP0704904B1 (en) * 1994-09-30 1999-05-26 Yozan Inc. Capacitance forming method
JP3182079B2 (ja) * 1996-05-30 2001-07-03 住友金属工業株式会社 半導体装置の容量素子の配線構造
WO2001059843A1 (en) * 2000-02-10 2001-08-16 Conexant Systems, Inc. An improved capacitor in semiconductor chips
US6980414B1 (en) 2004-06-16 2005-12-27 Marvell International, Ltd. Capacitor structure in a semiconductor device
US8169014B2 (en) * 2006-01-09 2012-05-01 Taiwan Semiconductor Manufacturing Co., Ltd. Interdigitated capacitive structure for an integrated circuit
US9177909B2 (en) 2013-08-14 2015-11-03 United Microelectronics Corp. Semiconductor capacitor

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58103163A (ja) * 1981-12-16 1983-06-20 Hitachi Ltd 容量素子

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004505485A (ja) * 2000-07-21 2004-02-19 セミコンダクタ アイディアズ ツー ザ マーケット(アイ ティ オー エム) デジタル制御キャパシタバンクを有する受信機
JP4828777B2 (ja) * 2000-07-21 2011-11-30 セミコンダクター アイディアズ トゥー ザ マーケット(アイ ティー オー エム)ビー ヴィ デジタル制御キャパシタバンクを有する受信機
US8558238B2 (en) 2006-06-01 2013-10-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
US8791461B2 (en) 2006-06-01 2014-07-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device

Also Published As

Publication number Publication date
CA1241454A (en) 1988-08-30
DE3582231D1 (de) 1991-04-25
JPH0455342B2 (enExample) 1992-09-03
CN1003067B (zh) 1989-01-11
NL8403932A (nl) 1986-07-16
EP0186239A1 (en) 1986-07-02
CN85109668A (zh) 1986-06-10
US4929998A (en) 1990-05-29
EP0186239B1 (en) 1991-03-20

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees