JPS6114543B2 - - Google Patents

Info

Publication number
JPS6114543B2
JPS6114543B2 JP56113371A JP11337181A JPS6114543B2 JP S6114543 B2 JPS6114543 B2 JP S6114543B2 JP 56113371 A JP56113371 A JP 56113371A JP 11337181 A JP11337181 A JP 11337181A JP S6114543 B2 JPS6114543 B2 JP S6114543B2
Authority
JP
Japan
Prior art keywords
subchannel
register
data transmission
interrupt
ccu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56113371A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5816336A (ja
Inventor
Masaki Nonaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Fuji Facom Corp
Original Assignee
Fuji Electric Co Ltd
Fuji Facom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Facom Corp filed Critical Fuji Electric Co Ltd
Priority to JP56113371A priority Critical patent/JPS5816336A/ja
Publication of JPS5816336A publication Critical patent/JPS5816336A/ja
Publication of JPS6114543B2 publication Critical patent/JPS6114543B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)
JP56113371A 1981-07-20 1981-07-20 デ−タ伝送制御装置 Granted JPS5816336A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56113371A JPS5816336A (ja) 1981-07-20 1981-07-20 デ−タ伝送制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56113371A JPS5816336A (ja) 1981-07-20 1981-07-20 デ−タ伝送制御装置

Publications (2)

Publication Number Publication Date
JPS5816336A JPS5816336A (ja) 1983-01-31
JPS6114543B2 true JPS6114543B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1986-04-19

Family

ID=14610584

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56113371A Granted JPS5816336A (ja) 1981-07-20 1981-07-20 デ−タ伝送制御装置

Country Status (1)

Country Link
JP (1) JPS5816336A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014177359A (ja) 2013-03-13 2014-09-25 Ricoh Co Ltd 複合酸化物、薄膜容量素子、液滴吐出ヘッド、複合酸化物の製造方法

Also Published As

Publication number Publication date
JPS5816336A (ja) 1983-01-31

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