JPS61139057A - 半導体集積回路装置の製造方法 - Google Patents

半導体集積回路装置の製造方法

Info

Publication number
JPS61139057A
JPS61139057A JP59261075A JP26107584A JPS61139057A JP S61139057 A JPS61139057 A JP S61139057A JP 59261075 A JP59261075 A JP 59261075A JP 26107584 A JP26107584 A JP 26107584A JP S61139057 A JPS61139057 A JP S61139057A
Authority
JP
Japan
Prior art keywords
conductivity type
region
forming
base region
active base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59261075A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0369179B2 (enExample
Inventor
Hideki Takada
秀希 高田
Hiroshi Iwasaki
博 岩崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP59261075A priority Critical patent/JPS61139057A/ja
Publication of JPS61139057A publication Critical patent/JPS61139057A/ja
Publication of JPH0369179B2 publication Critical patent/JPH0369179B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP59261075A 1984-12-11 1984-12-11 半導体集積回路装置の製造方法 Granted JPS61139057A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59261075A JPS61139057A (ja) 1984-12-11 1984-12-11 半導体集積回路装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59261075A JPS61139057A (ja) 1984-12-11 1984-12-11 半導体集積回路装置の製造方法

Publications (2)

Publication Number Publication Date
JPS61139057A true JPS61139057A (ja) 1986-06-26
JPH0369179B2 JPH0369179B2 (enExample) 1991-10-31

Family

ID=17356727

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59261075A Granted JPS61139057A (ja) 1984-12-11 1984-12-11 半導体集積回路装置の製造方法

Country Status (1)

Country Link
JP (1) JPS61139057A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6043541A (en) * 1996-01-16 2000-03-28 Micron Technology, Inc. Bipolar-CMOS (BiCMOS) process for fabricating integrated circuits
US8921914B2 (en) 2005-07-20 2014-12-30 Micron Technology, Inc. Devices with nanocrystals and methods of formation

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57134956A (en) * 1981-02-14 1982-08-20 Mitsubishi Electric Corp Manufacture of semiconductor integrated circuit
JPS58225663A (ja) * 1982-06-23 1983-12-27 Toshiba Corp 半導体装置の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57134956A (en) * 1981-02-14 1982-08-20 Mitsubishi Electric Corp Manufacture of semiconductor integrated circuit
JPS58225663A (ja) * 1982-06-23 1983-12-27 Toshiba Corp 半導体装置の製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6043541A (en) * 1996-01-16 2000-03-28 Micron Technology, Inc. Bipolar-CMOS (BiCMOS) process for fabricating integrated circuits
US6475850B2 (en) 1996-01-16 2002-11-05 Micron Technology, Inc. Bipolar-CMOS (BiCMOS) process for fabricating integrated circuits
US8921914B2 (en) 2005-07-20 2014-12-30 Micron Technology, Inc. Devices with nanocrystals and methods of formation

Also Published As

Publication number Publication date
JPH0369179B2 (enExample) 1991-10-31

Similar Documents

Publication Publication Date Title
US4818720A (en) Method for manufacturing a BiCMOS device
JP3253667B2 (ja) 半導体装置の製造方法
JPH04226066A (ja) Ｂｉｃｍｏｓ装置及びその製造方法
JPS6379368A (ja) ポリシリコンエミッタ及びシリサイド化ベ−スを持った高性能ＢｉＣＭＯＳ構成体の製造方法
US5082796A (en) Use of polysilicon layer for local interconnect in a CMOS or BiCMOS technology incorporating sidewall spacers
JPH0583195B2 (enExample)
JPH0348457A (ja) 半導体装置およびその製造方法
JPH04226064A (ja) 半導体装置用の相互接続体及びその製造方法
US5443994A (en) Method of fabricating a semiconductor device having a borosilicate glass spacer
JPH0557741B2 (enExample)
JP2504567B2 (ja) 半導体装置の製造方法
JPS6072255A (ja) 半導体集積回路装置およびその製造方法
JPH02101747A (ja) 半導体集積回路とその製造方法
JP3165715B2 (ja) 半導体装置の製造方法
JPS61139057A (ja) 半導体集積回路装置の製造方法
JP2697631B2 (ja) 半導体装置の製造方法
KR950012742B1 (ko) 2극성 및 상보 전계효과 트랜지스터들(BiCMOS)을 동시에 제조하는 방법
JP2969846B2 (ja) ＢｉＣＭＯＳ集積回路装置の製造方法
JP2793207B2 (ja) 半導体装置の製造方法
JP2573303B2 (ja) 半導体装置の製造方法
KR0147651B1 (ko) 바이 씨 모스 장치 및 그 제조방법
JPH0474463A (ja) 半導体装置の製造方法
JP2915040B2 (ja) 半導体装置の製造方法
JPH0240220B2 (enExample)
JPS61251164A (ja) Ｂｉ−ＭＩＳ集積回路の製造方法

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term