JPS61126837A - 初期同期化制御方式 - Google Patents

初期同期化制御方式

Info

Publication number
JPS61126837A
JPS61126837A JP59247029A JP24702984A JPS61126837A JP S61126837 A JPS61126837 A JP S61126837A JP 59247029 A JP59247029 A JP 59247029A JP 24702984 A JP24702984 A JP 24702984A JP S61126837 A JPS61126837 A JP S61126837A
Authority
JP
Japan
Prior art keywords
signal
time
station
master station
slave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59247029A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0254979B2 (enExample
Inventor
Susumu Sasaki
進 佐々木
Shiyouji Akutsu
垰　将司
Hiroshi Nakayama
浩 中山
Kazunori Tanaka
和則 田中
Tamaaki Yoshida
彰顕 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP59247029A priority Critical patent/JPS61126837A/ja
Publication of JPS61126837A publication Critical patent/JPS61126837A/ja
Publication of JPH0254979B2 publication Critical patent/JPH0254979B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP59247029A 1984-11-24 1984-11-24 初期同期化制御方式 Granted JPS61126837A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59247029A JPS61126837A (ja) 1984-11-24 1984-11-24 初期同期化制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59247029A JPS61126837A (ja) 1984-11-24 1984-11-24 初期同期化制御方式

Publications (2)

Publication Number Publication Date
JPS61126837A true JPS61126837A (ja) 1986-06-14
JPH0254979B2 JPH0254979B2 (enExample) 1990-11-26

Family

ID=17157342

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59247029A Granted JPS61126837A (ja) 1984-11-24 1984-11-24 初期同期化制御方式

Country Status (1)

Country Link
JP (1) JPS61126837A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05244145A (ja) * 1991-04-30 1993-09-21 Nec Corp 可変タイミング信号発生回路
US7882324B2 (en) * 2007-10-30 2011-02-01 Qimonda Ag Method and apparatus for synchronizing memory enabled systems with master-slave architecture

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05244145A (ja) * 1991-04-30 1993-09-21 Nec Corp 可変タイミング信号発生回路
US7882324B2 (en) * 2007-10-30 2011-02-01 Qimonda Ag Method and apparatus for synchronizing memory enabled systems with master-slave architecture

Also Published As

Publication number Publication date
JPH0254979B2 (enExample) 1990-11-26

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