JPS61113274U - - Google Patents
Info
- Publication number
- JPS61113274U JPS61113274U JP19785184U JP19785184U JPS61113274U JP S61113274 U JPS61113274 U JP S61113274U JP 19785184 U JP19785184 U JP 19785184U JP 19785184 U JP19785184 U JP 19785184U JP S61113274 U JPS61113274 U JP S61113274U
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- cushioning material
- component package
- lead
- package according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012790 confirmation Methods 0.000 description 1
- 238000010897 surface acoustic wave method Methods 0.000 description 1
Description
第1図は本考案の電子部品包装体の一実施例を
示す断面図、第2図はその上面図、第3図は他の
実施例を示す断面図、第4図はその上面図、第5
図は従来の電子部品包装体を示す断面図である。
1……弾性表面波デバイス、1a……リードピ
ン、2……緩衝材、3……リードピン確認用凹部
、4……位置決め用凹部。
Fig. 1 is a sectional view showing one embodiment of the electronic component package of the present invention, Fig. 2 is a top view thereof, Fig. 3 is a sectional view showing another embodiment, and Fig. 4 is a top view thereof. 5
The figure is a sectional view showing a conventional electronic component package. DESCRIPTION OF SYMBOLS 1... Surface acoustic wave device, 1a... Lead pin, 2... Cushioning material, 3... Recessed part for lead pin confirmation, 4... Recessed part for positioning.
Claims (1)
ピンを、平板状の緩衝材へ挿通させてなる電子部
品包装体において、前記緩衝材の電子部品挿通部
の下面に、前記電子部品のリードピン先端が露出
するだけの深さのリードピン確認用凹部を形成し
たことを特徴とする電子部品包装体。 (2) 前記緩衝材の上面に、前記電子部品の本体
の底部が嵌合可能な位置決め用凹部が形成されて
いる実用新案登録請求の範囲第1項記載の電子部
品包装体。 (3) 前記緩衝材の上面と下面間の厚さが前記電
子部品の全体の高さより厚くされている実用新案
登録請求の範囲第1項又は第2項記載の電子部品
包装体。[Claims for Utility Model Registration] (1) In an electronic component package in which the lead pin of an electronic component having a lead pin is inserted into a flat cushioning material, the An electronic component package characterized by forming a recess for confirming lead pins deep enough to expose the tips of lead pins of electronic components. (2) The electronic component package according to claim 1, wherein a positioning recess into which the bottom of the main body of the electronic component can fit is formed on the upper surface of the cushioning material. (3) The electronic component package according to claim 1 or 2, wherein the thickness between the upper and lower surfaces of the cushioning material is greater than the overall height of the electronic component.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19785184U JPS61113274U (en) | 1984-12-28 | 1984-12-28 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19785184U JPS61113274U (en) | 1984-12-28 | 1984-12-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61113274U true JPS61113274U (en) | 1986-07-17 |
Family
ID=30756366
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19785184U Pending JPS61113274U (en) | 1984-12-28 | 1984-12-28 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61113274U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6470384A (en) * | 1987-09-07 | 1989-03-15 | Fujitsu Ltd | Pin grid array type package carrier |
-
1984
- 1984-12-28 JP JP19785184U patent/JPS61113274U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6470384A (en) * | 1987-09-07 | 1989-03-15 | Fujitsu Ltd | Pin grid array type package carrier |
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