JPH0165147U - - Google Patents

Info

Publication number
JPH0165147U
JPH0165147U JP1987160139U JP16013987U JPH0165147U JP H0165147 U JPH0165147 U JP H0165147U JP 1987160139 U JP1987160139 U JP 1987160139U JP 16013987 U JP16013987 U JP 16013987U JP H0165147 U JPH0165147 U JP H0165147U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
circuit board
sealing
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1987160139U
Other languages
Japanese (ja)
Other versions
JPH0543486Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987160139U priority Critical patent/JPH0543486Y2/ja
Publication of JPH0165147U publication Critical patent/JPH0165147U/ja
Application granted granted Critical
Publication of JPH0543486Y2 publication Critical patent/JPH0543486Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Casings For Electric Apparatus (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の実施例を示す断面図、第２図
は従来例を示す断面図である。 １は混成集積回路基板、２は回路素子、３は外
部リード、４は封止容器。 FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a sectional view showing a conventional example. 1 is a hybrid integrated circuit board, 2 is a circuit element, 3 is an external lead, and 4 is a sealed container.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数の回路素子が固着された混成集積回路基板
と、前記混成集積回路基板の少なくとも対向する
側辺端部から導出され直角に折曲げられた外部リ
ードと、前記混成集積回路基板に固着され前記回
路素子を密封封止する封止部と前記封止部の側面
に前記外部リードを位置規制するためのガイド部
とを備えた封止容器とからなる混成集積回路にお
いて、前記ガイド部の上面側にテーパ面を有する
孔を設け、前記孔のテーパ面と当接する保持部を
前記外部リードに設けたことを特徴とする混成集
積回路。 a hybrid integrated circuit board to which a plurality of circuit elements are fixed; external leads led from at least opposing side edges of the hybrid integrated circuit board and bent at right angles; and a circuit fixed to the hybrid integrated circuit board. In a hybrid integrated circuit comprising a sealing container having a sealing part for hermetically sealing an element and a guide part for regulating the position of the external lead on a side surface of the sealing part, the upper surface side of the guide part A hybrid integrated circuit characterized in that a hole having a tapered surface is provided, and the external lead is provided with a holding portion that comes into contact with the tapered surface of the hole.
JP1987160139U 1987-10-20 1987-10-20 Expired - Lifetime JPH0543486Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987160139U JPH0543486Y2 (en) 1987-10-20 1987-10-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987160139U JPH0543486Y2 (en) 1987-10-20 1987-10-20

Publications (2)

Publication Number Publication Date
JPH0165147U true JPH0165147U (en) 1989-04-26
JPH0543486Y2 JPH0543486Y2 (en) 1993-11-02

Family

ID=31441945

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987160139U Expired - Lifetime JPH0543486Y2 (en) 1987-10-20 1987-10-20

Country Status (1)

Country Link
JP (1) JPH0543486Y2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5625883B2 (en) * 1973-08-03 1981-06-15
JPS5535813U (en) * 1978-08-29 1980-03-07

Also Published As

Publication number Publication date
JPH0543486Y2 (en) 1993-11-02

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