JPS61113196A - バイアス電圧発生回路 - Google Patents

バイアス電圧発生回路

Info

Publication number
JPS61113196A
JPS61113196A JP59234609A JP23460984A JPS61113196A JP S61113196 A JPS61113196 A JP S61113196A JP 59234609 A JP59234609 A JP 59234609A JP 23460984 A JP23460984 A JP 23460984A JP S61113196 A JPS61113196 A JP S61113196A
Authority
JP
Japan
Prior art keywords
transistor
bias voltage
voltage
transistors
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59234609A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0249000B2 (enrdf_load_stackoverflow
Inventor
Sumio Tanaka
田中　寿実夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP59234609A priority Critical patent/JPS61113196A/ja
Publication of JPS61113196A publication Critical patent/JPS61113196A/ja
Publication of JPH0249000B2 publication Critical patent/JPH0249000B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Read Only Memory (AREA)
JP59234609A 1984-11-07 1984-11-07 バイアス電圧発生回路 Granted JPS61113196A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59234609A JPS61113196A (ja) 1984-11-07 1984-11-07 バイアス電圧発生回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59234609A JPS61113196A (ja) 1984-11-07 1984-11-07 バイアス電圧発生回路

Publications (2)

Publication Number Publication Date
JPS61113196A true JPS61113196A (ja) 1986-05-31
JPH0249000B2 JPH0249000B2 (enrdf_load_stackoverflow) 1990-10-26

Family

ID=16973718

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59234609A Granted JPS61113196A (ja) 1984-11-07 1984-11-07 バイアス電圧発生回路

Country Status (1)

Country Link
JP (1) JPS61113196A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5353252A (en) * 1990-04-27 1994-10-04 Nec Corporation Semiconductor integrated circuit device having digit line biasing means
US5694362A (en) * 1996-06-24 1997-12-02 International Business Machines Corporation Method and apparatus for high speed comparison

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5353252A (en) * 1990-04-27 1994-10-04 Nec Corporation Semiconductor integrated circuit device having digit line biasing means
US5694362A (en) * 1996-06-24 1997-12-02 International Business Machines Corporation Method and apparatus for high speed comparison

Also Published As

Publication number Publication date
JPH0249000B2 (enrdf_load_stackoverflow) 1990-10-26

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term