JPS61111561A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS61111561A
JPS61111561A JP59209238A JP20923884A JPS61111561A JP S61111561 A JPS61111561 A JP S61111561A JP 59209238 A JP59209238 A JP 59209238A JP 20923884 A JP20923884 A JP 20923884A JP S61111561 A JPS61111561 A JP S61111561A
Authority
JP
Japan
Prior art keywords
chip
pads
contact film
contact
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59209238A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0577184B2 (enExample
Inventor
Satoru Tanizawa
谷澤　哲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59209238A priority Critical patent/JPS61111561A/ja
Priority to US06/784,439 priority patent/US4721995A/en
Priority to DE8585401948T priority patent/DE3571535D1/de
Priority to EP85401948A priority patent/EP0178227B1/en
Publication of JPS61111561A publication Critical patent/JPS61111561A/ja
Publication of JPH0577184B2 publication Critical patent/JPH0577184B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP59209238A 1984-10-05 1984-10-05 半導体装置 Granted JPS61111561A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP59209238A JPS61111561A (ja) 1984-10-05 1984-10-05 半導体装置
US06/784,439 US4721995A (en) 1984-10-05 1985-10-04 Integrated circuit semiconductor device formed on a wafer
DE8585401948T DE3571535D1 (en) 1984-10-05 1985-10-04 Integrated circuit semiconductor device formed on a wafer
EP85401948A EP0178227B1 (en) 1984-10-05 1985-10-04 Integrated circuit semiconductor device formed on a wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59209238A JPS61111561A (ja) 1984-10-05 1984-10-05 半導体装置

Publications (2)

Publication Number Publication Date
JPS61111561A true JPS61111561A (ja) 1986-05-29
JPH0577184B2 JPH0577184B2 (enExample) 1993-10-26

Family

ID=16569645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59209238A Granted JPS61111561A (ja) 1984-10-05 1984-10-05 半導体装置

Country Status (4)

Country Link
US (1) US4721995A (enExample)
EP (1) EP0178227B1 (enExample)
JP (1) JPS61111561A (enExample)
DE (1) DE3571535D1 (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01500944A (ja) * 1986-09-26 1989-03-30 ゼネラル・エレクトリック・カンパニイ 多重チップ集積回路パッケージ、集積回路チップのパッケージ及び集積回路チップをパッケージする方法
JP2018531504A (ja) * 2015-09-02 2018-10-25 オキュラス ブイアール，エルエルシー 半導体デバイスの組立
US10916192B2 (en) 2016-04-26 2021-02-09 Facebook Technologies, Llc Display with redundant light emitting devices

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* Cited by examiner, † Cited by third party
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WO1987006766A1 (en) * 1986-05-01 1987-11-05 Honeywell Inc. Multiple integrated circuit interconnection arrangement
US5094709A (en) * 1986-09-26 1992-03-10 General Electric Company Apparatus for packaging integrated circuit chips employing a polymer film overlay layer
US4866508A (en) * 1986-09-26 1989-09-12 General Electric Company Integrated circuit packaging configuration for rapid customized design and unique test capability
EP0286660B1 (en) * 1986-09-26 1992-03-04 General Electric Company Method and configuration for testing electronic circuits and integrated circuit chips using a removable overlay layer
US4937203A (en) * 1986-09-26 1990-06-26 General Electric Company Method and configuration for testing electronic circuits and integrated circuit chips using a removable overlay layer
US4884122A (en) * 1988-08-05 1989-11-28 General Electric Company Method and configuration for testing electronic circuits and integrated circuit chips using a removable overlay layer
JPS63131561A (ja) * 1986-11-18 1988-06-03 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 電子パツケージ
US4835704A (en) * 1986-12-29 1989-05-30 General Electric Company Adaptive lithography system to provide high density interconnect
US5191224A (en) * 1987-04-22 1993-03-02 Hitachi, Ltd. Wafer scale of full wafer memory system, packaging method thereof, and wafer processing method employed therein
US4933810A (en) * 1987-04-30 1990-06-12 Honeywell Inc. Integrated circuit interconnector
US5089881A (en) * 1988-11-03 1992-02-18 Micro Substrates, Inc. Fine-pitch chip carrier
US5038201A (en) * 1988-11-08 1991-08-06 Westinghouse Electric Corp. Wafer scale integrated circuit apparatus
DE68929282T2 (de) * 1988-11-09 2001-06-07 Nitto Denko Corp., Ibaraki Leitersubstrat, Filmträger, Halbleiteranordnung mit dem Filmträger und Montagestruktur mit der Halbleiteranordnung
JPH02174255A (ja) * 1988-12-27 1990-07-05 Mitsubishi Electric Corp 半導体集積回路装置
US5349219A (en) * 1989-06-15 1994-09-20 Fujitsu Limited Wafer-scale semiconductor integrated circuit device and method of forming interconnection lines arranged between chips of wafer-scale semiconductor integrated circuit device
EP0432259A1 (en) * 1989-07-03 1991-06-19 General Electric Company Electronic systems disposed in a high force environment
US5231304A (en) * 1989-07-27 1993-07-27 Grumman Aerospace Corporation Framed chip hybrid stacked layer assembly
GB8918482D0 (en) * 1989-08-14 1989-09-20 Inmos Ltd Packaging semiconductor chips
US5239191A (en) * 1990-01-19 1993-08-24 Kabushiki Kaisha Toshiba Semiconductor wafer
US5146303A (en) * 1990-04-05 1992-09-08 General Electric Company Compact, thermally efficient focal plane array and testing and repair thereof
US5157255A (en) * 1990-04-05 1992-10-20 General Electric Company Compact, thermally efficient focal plane array and testing and repair thereof
US5237203A (en) * 1991-05-03 1993-08-17 Trw Inc. Multilayer overlay interconnect for high-density packaging of circuit elements
JP2715810B2 (ja) * 1991-07-25 1998-02-18 日本電気株式会社 フィルムキャリア半導体装置とその製造方法
US5184284A (en) * 1991-09-03 1993-02-02 International Business Machines Corporation Method and apparatus for implementing engineering changes for integrated circuit module
US5239448A (en) * 1991-10-28 1993-08-24 International Business Machines Corporation Formulation of multichip modules
US5355019A (en) * 1992-03-04 1994-10-11 At&T Bell Laboratories Devices with tape automated bonding
JPH06151685A (ja) * 1992-11-04 1994-05-31 Mitsubishi Electric Corp Ｍｃｐ半導体装置
US5703405A (en) * 1993-03-15 1997-12-30 Motorola, Inc. Integrated circuit chip formed from processing two opposing surfaces of a wafer
JPH07169872A (ja) * 1993-12-13 1995-07-04 Fujitsu Ltd 半導体装置及びその製造方法
US6222212B1 (en) 1994-01-27 2001-04-24 Integrated Device Technology, Inc. Semiconductor device having programmable interconnect layers
US5766972A (en) * 1994-06-02 1998-06-16 Mitsubishi Denki Kabushiki Kaisha Method of making resin encapsulated semiconductor device with bump electrodes
US5675180A (en) 1994-06-23 1997-10-07 Cubic Memory, Inc. Vertical interconnect process for silicon segments
US6255726B1 (en) 1994-06-23 2001-07-03 Cubic Memory, Inc. Vertical interconnect process for silicon segments with dielectric isolation
US5698895A (en) * 1994-06-23 1997-12-16 Cubic Memory, Inc. Silicon segment programming method and apparatus
US6080596A (en) * 1994-06-23 2000-06-27 Cubic Memory Inc. Method for forming vertical interconnect process for silicon segments with dielectric isolation
US5891761A (en) * 1994-06-23 1999-04-06 Cubic Memory, Inc. Method for forming vertical interconnect process for silicon segments with thermally conductive epoxy preform
US6124633A (en) * 1994-06-23 2000-09-26 Cubic Memory Vertical interconnect process for silicon segments with thermally conductive epoxy preform
US6486528B1 (en) 1994-06-23 2002-11-26 Vertical Circuits, Inc. Silicon segment programming apparatus and three terminal fuse configuration
US5657206A (en) * 1994-06-23 1997-08-12 Cubic Memory, Inc. Conductive epoxy flip-chip package and method
US5518964A (en) * 1994-07-07 1996-05-21 Tessera, Inc. Microelectronic mounting with multiple lead deformation and bonding
US5688716A (en) 1994-07-07 1997-11-18 Tessera, Inc. Fan-out semiconductor chip assembly
US6429112B1 (en) 1994-07-07 2002-08-06 Tessera, Inc. Multi-layer substrates and fabrication processes
US6117694A (en) * 1994-07-07 2000-09-12 Tessera, Inc. Flexible lead structures and methods of making same
US6828668B2 (en) * 1994-07-07 2004-12-07 Tessera, Inc. Flexible lead structures and methods of making same
US5798286A (en) 1995-09-22 1998-08-25 Tessera, Inc. Connecting multiple microelectronic elements with lead deformation
US5830782A (en) * 1994-07-07 1998-11-03 Tessera, Inc. Microelectronic element bonding with deformation of leads in rows
US6848173B2 (en) * 1994-07-07 2005-02-01 Tessera, Inc. Microelectric packages having deformed bonded leads and methods therefor
US5666003A (en) * 1994-10-24 1997-09-09 Rohm Co. Ltd. Packaged semiconductor device incorporating heat sink plate
US5639683A (en) * 1994-12-01 1997-06-17 Motorola, Inc. Structure and method for intergrating microwave components on a substrate
JPH08288424A (ja) * 1995-04-18 1996-11-01 Nec Corp 半導体装置
US5653019A (en) * 1995-08-31 1997-08-05 Regents Of The University Of California Repairable chip bonding/interconnect process
RU2133067C1 (ru) * 1996-02-20 1999-07-10 Завьялов Дмитрий Валентинович Интегральная схема
US6667560B2 (en) 1996-05-29 2003-12-23 Texas Instruments Incorporated Board on chip ball grid array
US5936311A (en) * 1996-12-31 1999-08-10 Intel Corporation Integrated circuit alignment marks distributed throughout a surface metal line
US6040624A (en) * 1997-10-02 2000-03-21 Motorola, Inc. Semiconductor device package and method
US6084306A (en) * 1998-05-29 2000-07-04 Texas Instruments Incorporated Bridging method of interconnects for integrated circuit packages
US6300679B1 (en) * 1998-06-01 2001-10-09 Semiconductor Components Industries, Llc Flexible substrate for packaging a semiconductor component
JP2001165998A (ja) * 1999-12-10 2001-06-22 Mitsubishi Electric Corp 半導体モジュール
EP1215725A3 (de) * 2000-12-18 2005-03-23 cubit electronics Gmbh Anordnung zur Aufnahme elektrischer Bauteile und kontaktloser Transponder
JP2003298002A (ja) * 2002-04-02 2003-10-17 Mitsubishi Electric Corp 半導体モジュール
JP2003298003A (ja) * 2002-04-03 2003-10-17 Mitsubishi Electric Corp 半導体モジュール
JP3828473B2 (ja) * 2002-09-30 2006-10-04 株式会社東芝 積層型半導体装置及びその製造方法
WO2006020565A2 (en) * 2004-08-09 2006-02-23 Blue29, Llc Barrier layer configurations and methods for processing microelectronic topographies having barrier layers

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GB1487945A (en) * 1974-11-20 1977-10-05 Ibm Semiconductor integrated circuit devices
JPS5915183B2 (ja) * 1976-08-16 1984-04-07 株式会社日立製作所 マトリツクス配線基板
FR2382101A1 (fr) * 1977-02-28 1978-09-22 Labo Electronique Physique Dispositif a semi-conducteur, comportant des pattes metalliques isolees
US4246595A (en) * 1977-03-08 1981-01-20 Matsushita Electric Industrial Co., Ltd. Electronics circuit device and method of making the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01500944A (ja) * 1986-09-26 1989-03-30 ゼネラル・エレクトリック・カンパニイ 多重チップ集積回路パッケージ、集積回路チップのパッケージ及び集積回路チップをパッケージする方法
JP2018531504A (ja) * 2015-09-02 2018-10-25 オキュラス ブイアール，エルエルシー 半導体デバイスの組立
US10878733B2 (en) 2015-09-02 2020-12-29 Facebook Technologies, Llc Assembly of semiconductor devices using multiple LED placement cycles
US10916192B2 (en) 2016-04-26 2021-02-09 Facebook Technologies, Llc Display with redundant light emitting devices
US11727869B2 (en) 2016-04-26 2023-08-15 Meta Platforms Technologies, Llc Display with redundant light emitting devices

Also Published As

Publication number Publication date
DE3571535D1 (en) 1989-08-17
EP0178227B1 (en) 1989-07-12
US4721995A (en) 1988-01-26
EP0178227A2 (en) 1986-04-16
JPH0577184B2 (enExample) 1993-10-26
EP0178227A3 (en) 1987-08-26

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