JPS61104583U - - Google Patents
Info
- Publication number
- JPS61104583U JPS61104583U JP19003484U JP19003484U JPS61104583U JP S61104583 U JPS61104583 U JP S61104583U JP 19003484 U JP19003484 U JP 19003484U JP 19003484 U JP19003484 U JP 19003484U JP S61104583 U JPS61104583 U JP S61104583U
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- adhesive
- electrode
- height
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 6
- 239000000853 adhesive Substances 0.000 claims description 5
- 230000001070 adhesive effect Effects 0.000 claims description 5
- 239000004020 conductor Substances 0.000 claims description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
第１図は本考案の一実施例を示しフラツトパツ
ケージの底面方向からの斜視図、第２図はその側
面図、第３図は前記フラツトパツケージを基板に
搭載した側断面図、第４図は従来例を示しチツプ
部品を基板に搭載した側断面図、第５図はその平
面図、第６図は従来例を示しフラツトパツケージ
を基板に搭載した側断面図、第７図はその平面図
、第８図は従来例を示し他のチツプ部品を基板に
搭載した側断面図、第９図は従来例を示し他のフ
ラツトパツケージを基板に搭載した側断面図、第
１０図は従来例を示し基板に形成された帯をレジ
ストが被つた側断面図である。
１…基板、２…導体層、４…接着剤、７…半田
、１１…フラツトパツケージ、１２…リード線、
１３…帯。
Fig. 1 shows an embodiment of the present invention, and Fig. 2 is a perspective view from the bottom of the flat package, Fig. 2 is a side view thereof, Fig. 3 is a side sectional view of the flat package mounted on a board, and Fig. 4 is a side sectional view of the flat package mounted on a board. The figure shows a conventional example and is a sectional side view of a chip component mounted on a board, FIG. 5 is a plan view thereof, FIG. FIG. 8 is a side sectional view showing a conventional example with other chip components mounted on a board, FIG. 9 is a side sectional view showing a conventional example and another flat package mounted on a board, and FIG. FIG. 3 is a side sectional view showing a conventional example in which a resist covers a band formed on a substrate. DESCRIPTION OF SYMBOLS 1... Board, 2... Conductor layer, 4... Adhesive, 7... Solder, 11... Flat package, 12... Lead wire,
13... Obi.
Claims (1)
置し、この接着剤によつて基板上に固定した後、
電極を導体層に半田接続する小型電気部品におい
て、基板上に塗布した接着剤の両側に位置して接
着剤の流出を防止する高さの帯を前記小型電気部
品の基板と対向する面に印刷によつて形成したこ
とを特徴とする小型電気部品。 ２ 実用新案登録請求の範囲第１項において、基
板の導体層と電極との間に間隙が生ずる高さの帯
としたことを特徴とする小型電気部品。[Claims for Utility Model Registration] 1. After placing an adhesive between the conductive layers formed on the substrate and fixing it on the substrate with this adhesive,
In a small electrical component in which an electrode is soldered to a conductive layer, strips of a height that are located on both sides of an adhesive coated on a substrate to prevent the adhesive from flowing out are printed on the surface of the small electrical component facing the substrate. A small electric component characterized by being formed by. 2. A small electric component according to claim 1 of the utility model registration claim, characterized in that the band has a height such that a gap is created between the conductor layer of the substrate and the electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19003484U JPS61104583U (en) | 1984-12-17 | 1984-12-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19003484U JPS61104583U (en) | 1984-12-17 | 1984-12-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61104583U true JPS61104583U (en) | 1986-07-03 |
Family
ID=30747479
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19003484U Pending JPS61104583U (en) | 1984-12-17 | 1984-12-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61104583U (en) |
-
1984
- 1984-12-17 JP JP19003484U patent/JPS61104583U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4164071A (en) | Method of forming a circuit board with integral terminals | |
| JPS61104583U (en) | ||
| JPS61104582U (en) | ||
| JPS61153372U (en) | ||
| JPH0519974Y2 (en) | ||
| JP2571902Y2 (en) | Electronic component mounting structure | |
| JPH041744Y2 (en) | ||
| JPS6120737Y2 (en) | ||
| JPS635248Y2 (en) | ||
| JPS6149453U (en) | ||
| JPH046212Y2 (en) | ||
| JP3067214U (en) | Composite semiconductor device | |
| JPH02136301U (en) | ||
| JPH01208874A (en) | Led head | |
| JPS61106072U (en) | ||
| JPS6398678U (en) | ||
| JPS6157555U (en) | ||
| JPS58182343U (en) | printed circuit board equipment | |
| JPS6186968U (en) | ||
| JPS61106071U (en) | ||
| JPS58173860A (en) | Assembly of electric parts | |
| JPS61183994A (en) | Printed circuit board for camera | |
| JPS60181031U (en) | Chip carrier board structure | |
| JPS61109169U (en) | ||
| JPS6048271U (en) | electrical circuit board |