JPS635248Y2 - - Google Patents
Info
- Publication number
- JPS635248Y2 JPS635248Y2 JP1982167117U JP16711782U JPS635248Y2 JP S635248 Y2 JPS635248 Y2 JP S635248Y2 JP 1982167117 U JP1982167117 U JP 1982167117U JP 16711782 U JP16711782 U JP 16711782U JP S635248 Y2 JPS635248 Y2 JP S635248Y2
- Authority
- JP
- Japan
- Prior art keywords
- external lead
- external
- hole
- electrically insulating
- present
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 239000004020 conductor Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 description 3
- 238000005219 brazing Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
【考案の詳細な説明】
本考案は電気絶縁基体上に導電性パターンを設
けた基板に半導体素子を搭載し組立てた、半導体
装置の外部リード取付用治具に関する。[Detailed Description of the Invention] The present invention relates to a jig for attaching external leads of a semiconductor device, which is assembled by mounting a semiconductor element on a substrate having a conductive pattern on an electrically insulating base.
従来、半導体装置用パツケージには、あらかじ
め外部回路との電気的結合を計るため、外部リー
ドを設けておくことが便宜である。それらの外部
リード諸寸法は、デユアル・イン・ライン形式で
代表される様に、一定のピツチで規格化され、互
換性、汎用性を確保している。 Conventionally, it has been convenient to provide a package for a semiconductor device with an external lead in order to ensure electrical connection with an external circuit in advance. The dimensions of these external leads are standardized at a certain pitch, as typified by the dual-in-line type, to ensure compatibility and versatility.
ところが、パツケージの製造工程からみると、
かかる外部リードを設けることは、外部リードの
材料コストは勿論、それ以上に外部リードを設け
る組立コストがかさむのである。それは、外部リ
ードの多いパツケージで急激に増大する。その
為、外部リードのない小型のハードレス・パツケ
ージが多用されるようにもなつている。本考案は
上記外部リードの工数対機能の比率を最大にする
様な取付構造の外部リード取付用治具を提供する
ものである。かかる目的達成の為の本考案の要旨
は外部リードの端部以外の部分にフランジ部を設
け、かかる外部リードを電気絶縁基板に設けた取
付穴部に挿入した構造を、全ての外部リードが挿
入される穴の各穴と上部にフランジ部の端部のみ
が接するようなテーパーを有する取付用治具を用
いて得ることにある。 However, when looking at the packaging manufacturing process,
Providing such an external lead not only increases the material cost of the external lead but also increases the assembly cost of providing the external lead. It increases rapidly in packages with many external leads. For this reason, small, hardless packages without external leads are increasingly being used. The present invention provides an external lead mounting jig having a mounting structure that maximizes the ratio of man-hours to function of the external lead. The gist of the present invention to achieve this purpose is to provide a flange section on the part other than the end of the external lead, and to insert the external lead into a mounting hole provided on an electrically insulating board, so that all external leads can be inserted. The object of the present invention is to use a mounting jig having a taper such that only the end of the flange portion contacts the upper portion of each hole.
本考案によれば、外部リード取付けの為の位置
出し、及びその組立コストを最小にすることがで
きるとともに、取付けた構造は堅固であつて、機
械的外力に対して十分な強度を持つものである。
以下、本考案を実施例に基づいて説明する。第１
図、第２図は従来の実施例を示す。第１図は、電
気絶縁基体１の表面に設けた金属層（図示せず）
に直接外部リード２を立て、ロー付した構造であ
る。その構造が簡単であることに特徴がある。第
２図は、電気絶縁基体１に設けた貫通孔に外部リ
ード２を挿入しロー付した構造である。この様な
構造は機械的に強固な構造であることが特徴であ
る。第３図は本考案の参考例を示す。本考案によ
る外部リード２には電気絶縁基体１に設けられた
貫通孔より断面積の大きいフランジ部３が設けら
れており、そのフランジ部の左右には一体的に長
短一対の棒状部材があり、短い部材側が電気絶縁
基体１に挿入される。長い部材側が最終的には製
品の外部リードをして機能することになる。この
様な構造にすれば第２図に示した従来の外部リー
ドに比較し、挿入する量がわずかですみ、工数の
増加をおさえつつ、機械的な強固な特徴は維持し
得る。また、この構造は製品としての外部リード
長さは一定値（第３図ｂのＬ１）を取り得るのに
比較し、従来の例では電気絶縁基板１の厚みによ
り変動してしまう。また、フランジ部はスタンド
オフとしてプリント配線基板が製品の底面と密着
することを防止する機能をも有する。従来の場合
にはスタンドオフは別途用意しなければならなか
つたのであるから便宜であるとともにコストダウ
ンにもつながる。 According to the present invention, it is possible to minimize the cost of positioning for external lead attachment and its assembly, and the attached structure is solid and has sufficient strength against external mechanical forces. be.
Hereinafter, the present invention will be explained based on examples. 1st
FIG. 2 shows a conventional embodiment. FIG. 1 shows a metal layer (not shown) provided on the surface of an electrically insulating base 1.
It has a structure in which the external lead 2 is directly erected and brazed. It is characterized by its simple structure. FIG. 2 shows a structure in which an external lead 2 is inserted into a through hole provided in an electrically insulating base 1 and brazed. Such a structure is characterized by being mechanically strong. FIG. 3 shows a reference example of the present invention. The external lead 2 according to the present invention is provided with a flange portion 3 having a larger cross-sectional area than the through hole provided in the electrically insulating base 1, and a pair of long and short rod-shaped members are integrally provided on the left and right sides of the flange portion. The short member side is inserted into the electrically insulating base 1. The long member side will eventually function as an external lead for the product. With such a structure, compared to the conventional external lead shown in FIG. 2, the amount of insertion is small, and the mechanical strength can be maintained while suppressing the increase in man-hours. Further, in this structure, the length of the external lead as a product can take a constant value (L1 in FIG. 3b), whereas in the conventional example, it varies depending on the thickness of the electrically insulating substrate 1. Further, the flange portion also functions as a standoff to prevent the printed wiring board from coming into close contact with the bottom surface of the product. In the conventional case, standoffs had to be prepared separately, so this is convenient and also leads to cost reduction.
さらに便宜なのは、それらが一定の位置に置か
れ、規格化された外部リードを構成した場合であ
る。それを詳細に説明すると次の様になる。第４
図は本考案の一実施例を示す。外部リード２を整
列治具に置けば、外部リードの重心はフランジ部
より下にあるため、整列治具の穴（規格された一
定寸法の間隔で設けられている）に挿入されるこ
とになる。第４図はこの様子を示したものであ
り、電気絶縁基体に挿入すべき外部リードの短部
材は上向きとなつている。したがつて、電気絶縁
基板を整列治具の上に貫通孔がその位置にくる様
に設けて、反転すれば貫通孔には外部リードが挿
入され、その後ロー付すればよい。一本一本外部
リードを立ててロー付することに比較すれば、工
数的に大幅なコストダウンが可能である。 It is even more convenient if they are placed in a fixed position and constitute standardized external leads. The detailed explanation is as follows. Fourth
The figure shows an embodiment of the invention. If the external lead 2 is placed on the alignment jig, the center of gravity of the external lead is below the flange, so it will be inserted into the holes (provided at regular intervals of a certain size) in the alignment jig. . FIG. 4 shows this situation, with the short member of the external lead to be inserted into the electrically insulating base facing upward. Therefore, the electrically insulating substrate is provided on the alignment jig so that the through hole is located at that position, and when it is turned over, the external lead is inserted into the through hole, and then soldered. Compared to setting up external leads one by one and brazing them, it is possible to significantly reduce costs in terms of man-hours.
第１図、第２図は従来の実施例を示す断面図、
第３図は本考案の参考例を示す断面図、第４図は
本考案の一実施例における外部リードの整列方法
の説明図である。
１……電気絶縁基板、２……外部リード、３…
…フランジ部、４……整列治具。
FIGS. 1 and 2 are cross-sectional views showing conventional embodiments,
FIG. 3 is a sectional view showing a reference example of the present invention, and FIG. 4 is an explanatory diagram of a method of aligning external leads in one embodiment of the present invention. 1...Electrical insulating board, 2...External lead, 3...
...Flange part, 4...Alignment jig.
Claims (1)
する電気絶縁基体に設けられた貫通孔に端部以外
にフランジを設けた外部リードを挿入した外部リ
ード取付構造を有する半導体装置の、全ての外部
リードが挿入される穴が設けられ、前記穴の上端
に前記フランジが端部のみで接するように傾斜面
が設けられていることを特徴とする半導体装置の
外部リード取付用治具。 All semiconductor devices having an external lead mounting structure in which an external lead with a flange other than the end is inserted into a through hole provided in an electrically insulating base having electrical conductor wiring perpendicular to the main surface of a plate-shaped base. 1. A jig for mounting an external lead of a semiconductor device, characterized in that a hole is provided into which the external lead is inserted, and an inclined surface is provided at an upper end of the hole so that the flange contacts only at the end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16711782U JPS5970354U (en) | 1982-11-04 | 1982-11-04 | Jig for mounting external leads of semiconductor devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16711782U JPS5970354U (en) | 1982-11-04 | 1982-11-04 | Jig for mounting external leads of semiconductor devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5970354U JPS5970354U (en) | 1984-05-12 |
| JPS635248Y2 true JPS635248Y2 (en) | 1988-02-12 |
Family
ID=30365698
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16711782U Granted JPS5970354U (en) | 1982-11-04 | 1982-11-04 | Jig for mounting external leads of semiconductor devices |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5970354U (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0777253B2 (en) * | 1986-03-20 | 1995-08-16 | イビデン株式会社 | Semiconductor mounting board |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5379273A (en) * | 1976-12-24 | 1978-07-13 | Iwaki Denshi Kk | Method of mounting lead pins to electronic circuit substrate |
| JPS5654583U (en) * | 1979-10-01 | 1981-05-13 |
-
1982
- 1982-11-04 JP JP16711782U patent/JPS5970354U/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5379273A (en) * | 1976-12-24 | 1978-07-13 | Iwaki Denshi Kk | Method of mounting lead pins to electronic circuit substrate |
| JPS5654583U (en) * | 1979-10-01 | 1981-05-13 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5970354U (en) | 1984-05-12 |
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