JPS609241A - フレーム同期方式 - Google Patents

フレーム同期方式

Info

Publication number
JPS609241A
JPS609241A JP58115210A JP11521083A JPS609241A JP S609241 A JPS609241 A JP S609241A JP 58115210 A JP58115210 A JP 58115210A JP 11521083 A JP11521083 A JP 11521083A JP S609241 A JPS609241 A JP S609241A
Authority
JP
Japan
Prior art keywords
synchronization
signal level
value
circuit
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58115210A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0137017B2 (enrdf_load_stackoverflow
Inventor
Yukihiro Okada
行弘 岡田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP58115210A priority Critical patent/JPS609241A/ja
Publication of JPS609241A publication Critical patent/JPS609241A/ja
Publication of JPH0137017B2 publication Critical patent/JPH0137017B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/042—Detectors therefor, e.g. correlators, state machines

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP58115210A 1983-06-28 1983-06-28 フレーム同期方式 Granted JPS609241A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58115210A JPS609241A (ja) 1983-06-28 1983-06-28 フレーム同期方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58115210A JPS609241A (ja) 1983-06-28 1983-06-28 フレーム同期方式

Publications (2)

Publication Number Publication Date
JPS609241A true JPS609241A (ja) 1985-01-18
JPH0137017B2 JPH0137017B2 (enrdf_load_stackoverflow) 1989-08-03

Family

ID=14657084

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58115210A Granted JPS609241A (ja) 1983-06-28 1983-06-28 フレーム同期方式

Country Status (1)

Country Link
JP (1) JPS609241A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62147831A (ja) * 1985-12-23 1987-07-01 Nec Home Electronics Ltd 同期保護回路
FR2617656A1 (fr) * 1987-06-30 1989-01-06 Thomson Csf Procede et dispositif pour l'acquisition de bits de synchronisation dans des systemes de transmission de donnees
JPH01228337A (ja) * 1988-03-09 1989-09-12 Matsushita Electric Ind Co Ltd フレーム同期保護回路

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62147831A (ja) * 1985-12-23 1987-07-01 Nec Home Electronics Ltd 同期保護回路
FR2617656A1 (fr) * 1987-06-30 1989-01-06 Thomson Csf Procede et dispositif pour l'acquisition de bits de synchronisation dans des systemes de transmission de donnees
US4860323A (en) * 1987-06-30 1989-08-22 Thomson-Csf Method and device for the acquisition of synchronization bits in data transmission systems
JPH01228337A (ja) * 1988-03-09 1989-09-12 Matsushita Electric Ind Co Ltd フレーム同期保護回路

Also Published As

Publication number Publication date
JPH0137017B2 (enrdf_load_stackoverflow) 1989-08-03

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