JPS6085550A - 半導体集積回路の抵抗値調整方法 - Google Patents

半導体集積回路の抵抗値調整方法

Info

Publication number
JPS6085550A
JPS6085550A JP19240383A JP19240383A JPS6085550A JP S6085550 A JPS6085550 A JP S6085550A JP 19240383 A JP19240383 A JP 19240383A JP 19240383 A JP19240383 A JP 19240383A JP S6085550 A JPS6085550 A JP S6085550A
Authority
JP
Japan
Prior art keywords
resistor
po1y
impurity
semiconductor integrated
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19240383A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0512862B2 (en:Method
Inventor
Mikio Hongo
幹雄 本郷
Katsuro Mizukoshi
克郎 水越
Takeoki Miyauchi
宮内　建興
Takao Kawanabe
川那部　隆夫
Morio Inoue
井上　盛生
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP19240383A priority Critical patent/JPS6085550A/ja
Publication of JPS6085550A publication Critical patent/JPS6085550A/ja
Publication of JPH0512862B2 publication Critical patent/JPH0512862B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP19240383A 1983-10-17 1983-10-17 半導体集積回路の抵抗値調整方法 Granted JPS6085550A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19240383A JPS6085550A (ja) 1983-10-17 1983-10-17 半導体集積回路の抵抗値調整方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19240383A JPS6085550A (ja) 1983-10-17 1983-10-17 半導体集積回路の抵抗値調整方法

Publications (2)

Publication Number Publication Date
JPS6085550A true JPS6085550A (ja) 1985-05-15
JPH0512862B2 JPH0512862B2 (en:Method) 1993-02-19

Family

ID=16290732

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19240383A Granted JPS6085550A (ja) 1983-10-17 1983-10-17 半導体集積回路の抵抗値調整方法

Country Status (1)

Country Link
JP (1) JPS6085550A (en:Method)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS609153A (ja) * 1983-06-29 1985-01-18 Hitachi Ltd 半導体集積回路内抵抗体の抵抗値調整方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS609153A (ja) * 1983-06-29 1985-01-18 Hitachi Ltd 半導体集積回路内抵抗体の抵抗値調整方法

Also Published As

Publication number Publication date
JPH0512862B2 (en:Method) 1993-02-19

Similar Documents

Publication Publication Date Title
US5329152A (en) Ablative etch resistant coating for laser personalization of integrated circuits
US5081439A (en) Thin film resistor and method for producing same
JPH0294555A (ja) トリミング抵抗体
US5233327A (en) Active resistor trimming by differential annealing
US6664500B2 (en) Laser-trimmable digital resistor
JP2001044001A (ja) 薄膜型抵抗器の構造及び抵抗値調整方法
US4374314A (en) Laser template trimming of circuit elements
JPS6085550A (ja) 半導体集積回路の抵抗値調整方法
JP2524049B2 (ja) 半導体集積回路およびその製造方法
CN100413000C (zh) 生产薄膜芯片电阻的方法
USH546H (en) Formation of thin-film resistors on silicon substrates
JPS609153A (ja) 半導体集積回路内抵抗体の抵抗値調整方法
JP7025817B2 (ja) バイポーラトランジスタの製造方法
JP5549049B2 (ja) 薄膜抵抗体、半導体装置及び薄膜抵抗体の製造方法
US3501829A (en) Method of applying contacts to a microcircuit
TW571426B (en) Manufacturing method of non-optical etched thin film resistor
JPH04186801A (ja) 薄膜抵抗体ならびにそれを内蔵した多層回路基板の製造方法
JP3198579B2 (ja) 半導体デバイスにおける抵抗調整方法
JPS58225648A (ja) 半導体装置
JPH03166757A (ja) 半導体装置
JPS6236396B2 (en:Method)
JPS5999757A (ja) 半導体集積回路装置の抵抗値調整方法
JPH0322062B2 (en:Method)
JPS6259893B2 (en:Method)
JPS63310160A (ja) レ−ザ−トリミング方法