JPS6057610A - Fabrication of single crystal thin film - Google Patents

Fabrication of single crystal thin film

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Publication number
JPS6057610A
JPS6057610A JP58165537A JP16553783A JPS6057610A JP S6057610 A JPS6057610 A JP S6057610A JP 58165537 A JP58165537 A JP 58165537A JP 16553783 A JP16553783 A JP 16553783A JP S6057610 A JPS6057610 A JP S6057610A
Authority
JP
Japan
Prior art keywords
thin film
insulating film
single crystal
polycrystalline
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58165537A
Other languages
Japanese (ja)
Inventor
Koichi Kugimiya
公一 釘宮
Noboru Nomura
登 野村
Yuichi Hirofuji
裕一 広藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58165537A priority Critical patent/JPS6057610A/en
Publication of JPS6057610A publication Critical patent/JPS6057610A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02598—Microstructure monocrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02689—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02691—Scanning of a beam

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Optics & Photonics (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To form a single crystal thin film with stability and good controllability by forming a polycrystalline thin film on an insulating film and apertures arranged on a single crystalline substrate so as to form frame from the periphery of the apertures to the central part continuously by the predetermined length followed by the irradiation with an energy beam. CONSTITUTION:The insulating film 32 having an aperture 33 is formed on a single crystal substrate 31 and a polycrystalline thin film 34 is formed on the aperture 33 and the insulating film 32. The thin film 34 is divided by an insulating film 37. The energy beam LB which is wider than the width of said division is scanned in an axis direction for single-crystallization. The length l=(3d/t)mum which is determined by the thickness of the polycrystalline thin film 34 dmum and the thickness of the insulating film 32 tmum is taken in the aperture 33 from the end of polycrystal 38 of the aperture 33 and the shape is so determined that this length l can cover the whole aperture. Thus, a polycrystalline part 36 is prevented from being formed partly and the single crystal thin film can be formed with stability and good controllability.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、単結晶薄膜上に活性素子を形成する電子部品
分野に大きな効用がある。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention has great utility in the field of electronic components in which active elements are formed on single crystal thin films.

従来例の構成とその問題点 単結晶中に電子回路素子を構成して電子部品を形成する
際、電気容量が刊随して問題になる場合が、特に高速の
素子に多く発生する。この容量を小さくするため、単結
晶を出来るだけ薄くする（例えば１μｍ　）ことが望ま
れる。研磨による薄膜化は数朋角で１０μｍ厚、数α角
では１００７ｚ　ｎＬ厚位が限度であり、これ以上薄く
できないし、又、このように小さい分割されたチップと
なると取り扱いが難しく量産性に欠けている。Conventional Structures and Their Problems When forming electronic components by configuring electronic circuit elements in a single crystal, problems often arise due to electrical capacitance, especially in high-speed devices. In order to reduce this capacitance, it is desirable to make the single crystal as thin as possible (for example, 1 μm). The thinning of the film by polishing is limited to a thickness of 10μm for a few angles, and 1007znL for a few α angles, and it cannot be made any thinner than this, and such small divided chips are difficult to handle and lack mass production. ing.

ウェブやフィラメント法などにより直接長い７；す膜結
晶を引き上げる方法もあるが、厚さは数６μＩｎであり
薄くすることができない。There is also a method of directly pulling a long film crystal using a web or filament method, but the thickness is only a few 6 μIn and cannot be made thin.

極く最近、レーザや電子線照射による単結晶薄膜の形成
法が報告されている。全面が絶縁膜である基板上に形成
された多結晶体を溶融して、！ｉ′ｌ、結晶化すること
が試みられており、多結晶体は１０〜１００／１ｍに大
粒形化はする。この方法に１９いてもやはり多結晶であ
り粒界が非常に多い。Very recently, methods for forming single crystal thin films using laser or electron beam irradiation have been reported. By melting a polycrystalline material formed on a substrate whose entire surface is an insulating film,! Attempts have been made to crystallize the polycrystalline material, and the polycrystalline material can be made into large grains with a size of 10 to 100/1 m. Even if this method is used, it is still polycrystalline and has many grain boundaries.

次に第１図に示すように、単結晶基板１１上の絶縁膜１
２に開口部１３を設け、多結晶薄膜１４を形成し、次に
、例えばレーザビームＬＢ又はＬＢ’を矢印のように走
査することによって、少なくとも種となっている開口部
′１３の縁に沿って単結晶が成長することが報告されて
いる。しかし、実際には、第１図ａ中の矢印に示すよう
に開口部１３の基板１１方向への熱損失は、絶縁膜１２
上より非常に大きい。このために、開口部１３を丁度溶
融する大きさのエネルギーを照射した場合には絶縁膜１
２上ではエネルギーが過度となり、逆に、絶縁膜１２上
で適度な照射エネルギーの場合では開口部１３ではエネ
ルギー不足となる。即ち、各々第２図ａ、ｂに対応して
示すように、エネルギーが過度となると絶縁膜１２上で
は溶融飛散による除去部１５が形成されたり、開口部１
３０部分がエネルギー不足となると開口部１３上では多
結晶部１６のまま一部が残存するなとの不拘−ｉ生や難
制御性がある。１７はエネルギー照射により単結晶化さ
れた部分を示す。Next, as shown in FIG.
An opening 13 is provided in the opening 2, a polycrystalline thin film 14 is formed, and then, for example, by scanning a laser beam LB or LB' in the direction of an arrow, at least the edge of the opening 13 serving as a seed is formed. It has been reported that single crystals can be grown. However, in reality, as shown by the arrow in FIG.
Much larger than above. For this reason, when the energy that is just enough to melt the opening 13 is irradiated, the insulating film 1
On the other hand, when the irradiation energy is moderate on the insulating film 12, the energy becomes insufficient on the opening 13. That is, as shown in FIGS. 2a and 2b, if the energy is excessive, removed portions 15 are formed on the insulating film 12 due to melting and scattering, and openings 1
If there is a lack of energy in the portion 30, a portion of the polycrystalline portion 16 may remain on the opening 13, resulting in unrestrained behavior and difficulty in control. 17 indicates a portion that has been made into a single crystal by energy irradiation.

発明の目的 本発明は、単結晶基板上の開口部を有する絶縁膜上に１
μｍ以下に及ぶ薄い単結晶薄膜を制御性よく、安定に形
成する方法を提供することを目的とする。Purpose of the Invention The present invention provides an insulating film having an opening on a single crystal substrate.
It is an object of the present invention to provide a method for stably forming a thin single crystal thin film having a thickness of μm or less with good controllability.

発明の構成 本発明の単結晶薄膜の形成方法は、単結晶基板上に開口
部を有する絶縁膜を形成し、前記開口部および絶縁膜上
に互いに絶縁物で分離された多結晶薄膜を形成し、前記
開口部を、前記開口部周辺の多結晶薄膜（厚さ６μｍ）
および前記絶縁膜（厚さｔμｍ）で定寸る長さく１　＝
　３ｄ／　ｔ　７ｚｍで前記開口部周辺より中央部まで
隙間なく縁どることができる大きさとし、前記多結晶薄
膜にエネルギービームを照射して単結晶化することを特
徴とするものである。Structure of the Invention The method for forming a single crystal thin film of the present invention includes forming an insulating film having an opening on a single crystal substrate, and forming polycrystalline thin films separated from each other by an insulating material on the opening and the insulating film. , the opening is covered with a polycrystalline thin film (thickness: 6 μm) around the opening.
and the length determined by the insulating film (thickness t μm) 1 =
The polycrystal thin film is characterized in that it has a size of 3d/t 7zm that allows it to be bordered from the periphery of the opening to the center without any gaps, and that the polycrystalline thin film is irradiated with an energy beam to become a single crystal.

実施例の説明 本発明者らは、多結晶薄膜（厚さ：ｄ）、絶縁膜として
酸化膜や窒化膜（厚さ：ｔ）、絶縁膜の開口部（巾又は
長さ：Ｌ）を種々に変化させ、エネルギービーム照射に
よる単結晶化実験の結果、次のような構成であれば良好
な単結晶薄膜を形成できることが判明した。DESCRIPTION OF EMBODIMENTS The present inventors have developed a polycrystalline thin film (thickness: d), an oxide film or nitride film as an insulating film (thickness: t), and various openings (width or length: L) in the insulating film. As a result of a single crystallization experiment using energy beam irradiation, it was found that a good single crystal thin film could be formed with the following configuration.

即ち第３図に示すように単結晶基板３１上に開口部３３
を有する絶縁膜３２が形成され、開口部３３、絶縁膜３
２上に多結晶簿膜３４が形成されており、多結晶薄膜３
４は絶縁膜３７によって分割されている。この分割され
たｄ］より広いエネルギービームＬＢを軸方向に走査し
、単結晶化する。That is, as shown in FIG. 3, an opening 33 is formed on a single crystal substrate 31.
An insulating film 32 having an opening 33 and an insulating film 3 is formed.
A polycrystalline thin film 34 is formed on the polycrystalline thin film 3.
4 is divided by an insulating film 37. This divided energy beam LB, which is wider than d], is scanned in the axial direction to form a single crystal.

この時、１３＝、ｓｄ／ｌ　ｐｍなる距離を開口部３３
の多結晶端３８から開口部３３内にとりこのｌで開口部
全面を覆うことのできる形状になっていると、前述第２
図のような不都合が回避されるが、そうでない場合、例
えばわずか開口部巾Ｌ〉２１のような時は、一部に多結
晶部３６が生ずることが認められる。At this time, the distance 13=, sd/l pm is set to the opening 33.
If the polycrystalline end 38 of the polycrystalline end 38 is inserted into the opening 33 and the shape is such that the entire surface of the opening can be covered with this l, the above-mentioned second
Although the inconvenience shown in the figure is avoided, if this is not the case, for example, when the opening width L>21, it is recognized that polycrystalline portions 36 are partially formed.

第４図に示すように、片方が絶縁膜４７で妨げられてい
る場合は、片方からｌの長さをとって開口部３３を全て
覆うことができればよい。As shown in FIG. 4, if one side is blocked by an insulating film 47, it is sufficient to cover the entire opening 33 by taking a length l from the other side.

６＝３ｄ／ｌの関係は、実験結°果より得られた関係で
あり、理論的解明は明白ではないが、概路次のように考
えられる。先ず、絶縁膜が極端に薄い場合、開口部」二
と絶縁膜上の多結晶薄膜の熱分布を考えれば全く差がな
いことが判る。この時は従って６＝ｃｃとなり、上式に
一致する。逆に絶縁膜が非常に厚い場合、開口部を溶融
する温度では絶縁膜上では過熱され多結晶薄膜が蒸発し
てしまい、逆に、絶縁膜上での最適加熱は、開口部に対
して熱入力が少なすぎ粒成長が幾分化ずる程度の温度上
昇しか認められない。即ちｌ＝Ｏとなる。The relationship 6=3d/l is a relationship obtained from experimental results, and although the theoretical explanation is not clear, it can be roughly considered as follows. First, when the insulating film is extremely thin, if we consider the heat distribution between the opening and the polycrystalline thin film on the insulating film, it can be seen that there is no difference at all. In this case, therefore, 6=cc, which matches the above equation. Conversely, if the insulating film is very thick, the temperature that melts the opening will overheat the insulating film and evaporate the polycrystalline thin film. The input is too small, and only a temperature increase that slightly slows grain growth is observed. That is, l=O.

多結晶薄膜の厚さｄは、一般にレーザや電子ビームの侵
入深さ等を考えると０．１〜１．０　ｌｔｍの範囲に限
られる。この範囲では、熱の横方向への拡散、縦方向へ
の拡散は同程度の量と考えられ、従って、熱の拡がりは
厚みに比例すると思われる。The thickness d of the polycrystalline thin film is generally limited to a range of 0.1 to 1.0 ltm, considering the penetration depth of a laser or electron beam. In this range, the amount of heat diffusion in the horizontal direction and the vertical direction are considered to be approximately the same, and therefore, the spread of heat is considered to be proportional to the thickness.

係数３には従って熱の拡散係数などの人一つだものにな
っている筈であるが、最終的には長さの単位（μｍ）を
もった係数となっている。以上のように上式は定性的に
理解される。Coefficient 3 should therefore be a unique factor, such as a heat diffusion coefficient, but ultimately it is a coefficient with a unit of length (μm). As described above, the above equation can be understood qualitatively.

次に、単結晶の評価を厳密にするのが容易な硅素単結晶
についての実施例を説明する。Next, an example will be described regarding a silicon single crystal, which makes it easy to strictly evaluate the single crystal.

硅素基板３１として、１ｏ○硅素ウエハを用い、この基
板を酸化ないしはプラズマ窒化膜デボにより絶縁膜３２
を厚さ０．１〜１．０μ７ｎまで各種形成し／こ後、開
口部３３としてＬ−１〜３０μｍを開けた。なお、絶縁
膜３７間の「］ｊ即ち多結晶部３４の巾は１０　、２０
μｍとし、多結晶薄膜３４は厚さ０．５７１ｍとした。A 1000 silicon wafer is used as the silicon substrate 31, and the insulating film 32 is formed on this substrate by oxidation or plasma nitride film deposition.
After forming various layers with a thickness of 0.1 to 1.0 .mu.7 nm, an opening 33 of L-1 to 30 .mu.m was formed. Note that the width of the polycrystalline portion 34 between the insulating films 37 is 10 and 20.
μm, and the polycrystalline thin film 34 had a thickness of 0.571 m.

エネルギービームとして、Ｌ　ｗ　−Ａ　ｒレーザを用
い焦点距Ｊｆｆ　１５０　ｍｍのレンズで絞り、焦点位
置においだ試別（３００ｃに加熱）を１００ｍＪＳ　で
送りながら、試料を溶融再結晶化した。照射エネルギー
は約５．５Ｗであり、横方向への送り巾は１５μｍであ
る。なお、レーザによる溶融中は約４０μｍあった。The sample was melted and recrystallized using an L w -Ar laser as the energy beam, focused by a lens with a focal length Jff of 150 mm, and sending a sample (heated to 300 cm) at the focal position at 100 mJS. The irradiation energy was approximately 5.5 W, and the width of the lateral feed was 15 μm. Note that the thickness was about 40 μm during laser melting.

実験の結果、第３図に示すような完全な単結晶に全面が
なる場合と、一部多結晶が残る部分が観察さｉｚだ。全
く、多結晶部分か観察されなくなる多結晶膜厚ｄ、絶縁
膜厚ｔ、開口部ｌ−１１，Ｌを次表に示す。はぼ６＝３
ｄ／ｌの線にのっているのが判る。As a result of the experiment, we observed cases where the entire surface became a complete single crystal as shown in Figure 3, and areas where polycrystals remained in some areas. The following table shows the polycrystalline film thickness d, insulating film thickness t, and openings l-11 and L at which no polycrystalline portions are observed. habo6=3
It can be seen that it is on the d/l line.

（Ｌ＝２ｇ）、又、酸化嘆、窒化膜の差は顕著には認め
られなかった。(L=2g), and no significant difference was observed between oxidation and nitride films.

以　下　余　白 ３　ｄ／　ｔの意味は概路次の様に考えられる。すなわ
ち、絶縁膜が極端に薄い場合、多結晶膜の溶融状態は絶
縁膜の上でも、開口部の上でも熱的な変化はなく、従っ
て１−（５）となる。多結晶薄膜の厚さが、絶縁膜の厚
さに比べ極端に厚くなっても同じ議論が成り立つ、しか
し、レーザや電子ビームの侵入深さは通常１μｍ位が限
度であり、本発明における実施例の範囲にある。Below Margin 3 The meaning of d/t can be roughly considered as follows. That is, when the insulating film is extremely thin, the melting state of the polycrystalline film does not thermally change either on the insulating film or on the opening, and therefore becomes 1-(5). The same argument holds true even if the thickness of the polycrystalline thin film is extremely thick compared to the thickness of the insulating film. However, the penetration depth of a laser or electron beam is usually limited to about 1 μm, and the embodiments of the present invention within the range of

多結晶薄膜が絶縁膜で分離されているために「１］全体
が一種の微小な帯域溶融となり、単結晶が成長すると思
われる。この点、絶縁膜で分離されていない場合とは基
本的に異なる。又、絶縁膜で分離されているだめ、横方
向への熱拡散がなく、その分熱が滞留し、溶融を促進し
ている。このため単結晶化が促進されていると考えられ
る。さらに開１］部を種として結晶成長を行うため、面
方位の制御は非常に容易である。Because the polycrystalline thin film is separated by an insulating film, "1" the whole becomes a kind of minute zone melting, and a single crystal is likely to grow. In addition, since they are separated by an insulating film, there is no lateral heat diffusion, so the heat stays there and promotes melting.This is thought to promote single crystallization. Furthermore, since crystal growth is performed using the open 1] portion as a seed, control of the plane orientation is very easy.

発明の効果 以上の説明で明らかなように、開口部を有する絶縁膜上
に、面、方位を共に側脚した厚さ１μｍ以下になる良質
の不連続単結晶薄膜を形成することができ、容量などの
少ない高速動作の電子部品用基板を提供することが可能
となる。Effects of the Invention As is clear from the above explanation, it is possible to form a high-quality discontinuous single-crystal thin film with a thickness of 1 μm or less with side edges in both plane and orientation on an insulating film having an opening, and to increase the capacitance. This makes it possible to provide a board for electronic components that operates at high speed and has a small number of components.

、４、図面の簡単な説明 第１図ａ、ｂは従来よりの単結晶薄膜形成状態の断面図
、概略平面図、第２図ａ、ｂばその結果生ずる欠陥の様
子を示す断面図、第３図ａ、ｂは本発明の一実施例の方
法を説明する薄膜形成断面図、平面図、第４図は本発明
の他の実施例の薄膜形成断面図である。, 4. Brief description of the drawings Figures 1a and b are cross-sectional views and schematic plan views of conventional single crystal thin film formation, Figures 2a and b are cross-sectional views showing the resulting defects, and Figures 2a and 2b are cross-sectional views showing the resulting defects. 3A and 3B are a cross-sectional view and a plan view of forming a thin film to explain a method according to an embodiment of the present invention, and FIG. 4 is a cross-sectional view of forming a thin film according to another embodiment of the present invention.

１７・・・・単結晶膜、３１・・・−・・単結晶硅素基
板、３２．３７．４７　・山陵化膜、３３−・開口部、
３４　・多結晶硅素薄膜、ＬＢ　・・レーザービーム。17...Single crystal film, 31...-...Single crystal silicon substrate, 32.37.47・Mountain-shaped film, 33-・Opening portion,
34 - Polycrystalline silicon thin film, LB...Laser beam.

Claims (1)

【特許請求の範囲】[Claims] 単結晶基板上に開口部を有する絶縁膜を形成し、前記開
口部および絶縁膜上に互いに絶縁物で分離された多結晶
薄膜を形成し、前記開口部を、前記開口部周辺の多結晶
薄膜（厚さｄ　７１　ｍ　）および前記絶縁膜（厚さｔ
７ｚｍ）で定まる長さｌ＝　３ｄ／ｌ　１ｔｍで前記開
口部周辺より中央部まで隙間なく縁どることができる大
きさどし、前記多結晶薄膜にエネルギービームを照射し
て単結晶化することを特徴とする単結晶薄膜の形成方法
。An insulating film having an opening is formed on a single crystal substrate, a polycrystalline thin film separated from each other by an insulating material is formed on the opening and the insulating film, and the opening is formed in the polycrystalline thin film around the opening. (thickness d 71 m) and the insulating film (thickness t
The polycrystalline thin film is irradiated with an energy beam to form a single crystal, with a length l = 3d/l 1tm determined by 7zm), which is a size that can be bordered from the periphery of the opening to the center without any gaps. Characteristic single crystal thin film formation method.
JP58165537A 1983-09-08 1983-09-08 Fabrication of single crystal thin film Pending JPS6057610A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58165537A JPS6057610A (en) 1983-09-08 1983-09-08 Fabrication of single crystal thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58165537A JPS6057610A (en) 1983-09-08 1983-09-08 Fabrication of single crystal thin film

Publications (1)

Publication Number Publication Date
JPS6057610A true JPS6057610A (en) 1985-04-03

Family

ID=15814266

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58165537A Pending JPS6057610A (en) 1983-09-08 1983-09-08 Fabrication of single crystal thin film

Country Status (1)

Country Link
JP (1) JPS6057610A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0216720A (en) * 1988-07-04 1990-01-19 Sanyo Electric Co Ltd Solid phase epitaxy method
US7199397B2 (en) * 2004-05-05 2007-04-03 Au Optronics Corporation AMOLED circuit layout

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
APPL.PHYS.LETT=1981 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0216720A (en) * 1988-07-04 1990-01-19 Sanyo Electric Co Ltd Solid phase epitaxy method
US7199397B2 (en) * 2004-05-05 2007-04-03 Au Optronics Corporation AMOLED circuit layout

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