JPS6147627A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6147627A
JPS6147627A JP16944684A JP16944684A JPS6147627A JP S6147627 A JPS6147627 A JP S6147627A JP 16944684 A JP16944684 A JP 16944684A JP 16944684 A JP16944684 A JP 16944684A JP S6147627 A JPS6147627 A JP S6147627A
Authority
JP
Japan
Prior art keywords
island
silicon
energy beam
semiconductor
width
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16944684A
Other languages
Japanese (ja)
Inventor
Shigenobu Akiyama
秋山 重信
Shigeji Yoshii
吉井 成次
Yasuaki Terui
照井 康明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP16944684A priority Critical patent/JPS6147627A/en
Publication of JPS6147627A publication Critical patent/JPS6147627A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation

Abstract

PURPOSE:To obtain a single crystal semiconductor layer having desired uniform plane orientation by providing an area which is narrower than the energy beam width to a part of the flat-shaped island. CONSTITUTION:After forming an insulation film, for example, SiO2 2 on a semiconductor substrate, for example, a silicon wafer 1, non single crystal semiconductor, for example, a polycrystalline silicon island 3 is formed in such a structure as being surrounded by an insulator such as SiO2 2. The flat shape of polycrystalline silicon island 3 has a narrow width portion B sandwiched by the wider regions A, C. The silicon island 3 thus obtained is irradiated with an energy beam, for example, argon CW laser with a power of 5-10W and scanning speed of 100mm./sec for recrystallization. The beam diameter is set larger than the width of narrow portion B of silicon island 3 at least for the direction of scanning the laser beam and the laser beam L is scanned to the portion C passing through the portion B from the portion A of silicon island 3. Thereby, the silicon of island 3 after irradiation of laser fuses and is recrystallized in accordance with scanning of laser beam L.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は半導体装置、特に、高集積、高速の高性能な完
全絶縁分離された半導体集積回路即ちS OI (Se
m1conductor On In5ulater 
)デバイス用基体の製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to semiconductor devices, particularly highly integrated, high-speed, high-performance, completely isolated semiconductor integrated circuits, that is, SOI (Se
m1conductor On In5ulator
) The present invention relates to a method for manufacturing a substrate for a device.

従来例の構成とその問題点 従来より高密度、高速の高性能半導体装置の実現を目脂
して、SOIデバイスの開発が活発に行われている。S
OIデバイスを作成する上で最も基本的な技術として、
絶縁基体上に単結晶半導体層を形成するいわゆる単結晶
化技術がある。前記単結晶化技術の中で、絶縁基体上に
絶縁物で囲まれた非単結晶半導体の島にレーザビームや
電子ビームなどのエネルギービームを照射して、前記島
状の非単結晶半導体を溶融し再結晶化する技術は比較的
単結晶の半導体層を得やすい技術であることが知られて
いる。
Conventional Structures and Their Problems SOI devices are being actively developed with the aim of realizing high-performance semiconductor devices with higher density and higher speed than ever before. S
As the most basic technology for creating OI devices,
There is a so-called single crystallization technique that forms a single crystal semiconductor layer on an insulating substrate. In the single crystallization technology, an energy beam such as a laser beam or an electron beam is irradiated onto an island of a non-single-crystal semiconductor surrounded by an insulator on an insulating substrate to melt the island-shaped non-single-crystal semiconductor. It is known that the recrystallization technique is relatively easy to obtain a single crystal semiconductor layer.

しかしながら上記の如く、島構造半導体層を溶融再結晶
化する方法においては、単結晶化島の面方位を制御して
形成することは困難であった。
However, as described above, in the method of melting and recrystallizing an island structure semiconductor layer, it is difficult to control the plane orientation of single crystal islands.

発明の目的 本発明は、非単結晶半導体層をエネルギービームの照射
により溶融再結晶化する方法において、単結晶化し易い
島構造を用い、しかも形成された単結晶化島の面方位を
制御して形成する方法であり、所望の面方位の揃った単
結晶化半導体層を得ることができる方法である。
Purpose of the Invention The present invention provides a method for melting and recrystallizing a non-single-crystal semiconductor layer by irradiating an energy beam, using an island structure that facilitates single-crystallization, and controlling the plane orientation of the formed single-crystalline island. This is a method for forming a single crystal semiconductor layer with a desired plane orientation.

発明の構成 本発明は、半導体基板上の絶縁物に形成された1 島状
の非単結晶半導体層をレーザなどのエネルギービームの
照射により溶融再結晶化させる方法において、島の平面
形状のうちの一部にエネルギービームよシも巾の狭い狭
部を設けることにより、ビーム走査に従って結晶成長が
進行していくとき、ビーム入射側の部分でできたいくつ
かの結晶粒が互いに衝突して結晶粒界を形成していくが
、上記狭部において多数の結晶粒の成長が停止し、殆ん
ど一つの結晶粒だけが成長し、その後の島部分が溶融再
結晶化するとき、上記残った一つの結晶粒が結晶種にな
って、ビーム走査方向の狭部よりうしろの部分の島は殆
んど完全に近い単結晶島を得る方法である。この時、単
結晶化島の結晶面方位を、非単結晶半導体島を形成する
ために堆積された非単結晶半導体層の堆積条件による面
方位異方性を利用して、所望の面方位とするものである
Structure of the Invention The present invention provides a method for melting and recrystallizing an island-shaped non-single crystal semiconductor layer formed on an insulator on a semiconductor substrate by irradiating an energy beam such as a laser. By providing a narrow part in a part of the energy beam, when crystal growth progresses as the beam scans, some crystal grains formed on the beam incident side collide with each other, resulting in crystal grains. However, the growth of many crystal grains stops in the narrow part, and almost only one crystal grain grows, and when the subsequent island part melts and recrystallizes, the remaining part In this method, one crystal grain becomes a crystal seed, and the island behind the narrow part in the beam scanning direction becomes an almost perfect single crystal island. At this time, the crystal plane orientation of the single crystallized island is adjusted to the desired plane orientation by using the plane orientation anisotropy caused by the deposition conditions of the non-single crystal semiconductor layer deposited to form the non-single crystal semiconductor island. It is something to do.

実施例の説明 本発明の一実施例を図面に基づき説明する。第1図の(
a)は本発明の一実施例における島構造シリコン3の平
面図である。x−x’間の断面図が、第1図の(b)に
示しである。半導体基板たとえばシリコンウェハ1上に
絶縁膜たとえば51022を形成したのち、非単結晶半
導体たとえば多結晶シリコン島3を51022等の絶縁
物に囲まれた構造で形成する。上記多結晶シリコン島3
の平面形状は、巾の広い部分A、Cに狭まれた巾の狭い
狭部Bを有している。
DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described based on the drawings. In Figure 1 (
a) is a plan view of an island structure silicon 3 in one embodiment of the present invention. A cross-sectional view along line xx' is shown in FIG. 1(b). After forming an insulating film such as 51022 on a semiconductor substrate such as a silicon wafer 1, a non-single crystal semiconductor such as a polycrystalline silicon island 3 is formed surrounded by an insulating material such as 51022. Above polycrystalline silicon island 3
The planar shape of has a narrow portion B narrowed by wide portions A and C.

かくして得られたシリコン島3にエネルギービームfc
トエハアルゴンCWレーザヲ、パワー5〜10W、走査
速度100mm / secで照射して再結晶化させる
。レーザ照射による再結晶化の状態を第1図の(C)に
模式的に示す。ビーム径が少くともレーザビームを走査
する方向に対するシリコン島3の狭部Bの巾より大きく
なるように設定し、シリコン島3のAの部分からBを通
ってCに向ってレーザービームLを走査する。なお、こ
の実施例ではビームLの径はA、Cの部分よりも大きい
ものを用いている。レーザ照射後高3のシリコンはレー
ザビームLの走査に従って溶融し再結晶化する。このと
き、レーザビームLがはじめに照射されるシリコン島3
のAの部分では、必ずしも単結晶とはならず、いくつか
の結晶粒となる。しかるに、シリコン島のBの部分では
、Aの部分で生じた複数個の結晶粒が狭くなった島の周
囲のS i 0部界面詠突し、殆んどの結晶粒の成長が
止まシ、成長して伸びていく結晶粒が淘汰され、再び広
がったシリコン島のCの部分に到達する時には殆んど単
一の結晶粒になる。したがってシリコン島の0部でシリ
コンが溶融再結晶化するときは、上記のシリコン島のB
部で生き残った結晶粒が種結晶となるために、シリコン
島の0部での再結晶シリコンは殆んど完全な単結晶のシ
リコン島3′となる。
An energy beam fc is applied to the silicon island 3 thus obtained.
Recrystallize by irradiating with a CW laser of argon at a power of 5 to 10 W and a scanning speed of 100 mm/sec. The state of recrystallization by laser irradiation is schematically shown in FIG. 1(C). Set the beam diameter to be at least larger than the width of the narrow part B of the silicon island 3 in the laser beam scanning direction, and scan the laser beam L from the part A of the silicon island 3 through B toward C. do. In this embodiment, the diameter of the beam L is larger than that of the portions A and C. After laser irradiation, the silicon with a height of 3 is melted and recrystallized as the laser beam L scans. At this time, the silicon island 3 is first irradiated with the laser beam L.
In the part A of , it is not necessarily a single crystal but has several crystal grains. However, in part B of the silicon island, multiple crystal grains generated in part A collide with the S i 0 interface around the narrowed island, and most of the grains stop growing. The growing crystal grains are weeded out, and by the time they reach part C of the silicon island, which has expanded again, they are almost a single crystal grain. Therefore, when silicon melts and recrystallizes at 0 part of the silicon island, the above B of the silicon island
Since the crystal grains that survive in the 0 part become seed crystals, the recrystallized silicon in the 0 part of the silicon island becomes an almost perfect single-crystal silicon island 3'.

かくの如く形成された、単結晶シリコン島3′の0部の
面方位は、B部で生き残った結晶粒の面方位を引きつい
でいることになる。
The plane orientation of the 0 part of the single crystal silicon island 3' thus formed follows the plane orientation of the crystal grains that survived in the B part.

第2図(a)に示す断面構造の試料は、シリコンウェハ
1上に51022を形成して、たとえばLPGVD(減
圧化学蒸着)法で610’Cの温度で形成された多結晶
シリコン層4からできている。このときの多結晶シリコ
ンはきわめて強い(11o)面の成長異方性を示すこと
が実験かられかっている。したがって、上記試料を第2
図の(b)に平面模式図を示すように、レーザビームL
を照射しながら走査して形成されたシリコンの再結晶化
層4′は、レーザビームの未照射部4の多結晶シリコン
が種となってレーザビーム走査の端部から結晶粒成長が
生じておシ、実験結果によれば、再結晶化シリコン層4
′の各結晶粒は、多結晶シリコン4の(11o)面方位
異方性を引き継ぎ、殆んど(11o)面であった。した
がって第1図の(e)に示す再結晶化シリコン島3′の
結晶面方位は、多結晶シリコン島3の形成時の多結晶シ
リコンの面方位異方性を引き継ぐことが多い。
The sample having the cross-sectional structure shown in FIG. 2(a) is made of a polycrystalline silicon layer 4 formed by forming a layer 51022 on a silicon wafer 1 at a temperature of 610'C by, for example, the LPGVD (low pressure chemical vapor deposition) method. ing. Experiments have shown that the polycrystalline silicon at this time exhibits extremely strong growth anisotropy in the (11o) plane. Therefore, the above sample
As shown in the schematic plan view in figure (b), the laser beam L
The recrystallized silicon layer 4' formed by scanning while irradiating the laser beam is formed by crystal grain growth occurring from the edge of the laser beam scan, with the polycrystalline silicon in the non-irradiated area 4 acting as a seed. According to the experimental results, the recrystallized silicon layer 4
The crystal grains ' inherited the (11o) orientation anisotropy of polycrystalline silicon 4 and were mostly (11o) planes. Therefore, the crystal plane orientation of the recrystallized silicon island 3' shown in FIG.

LPCVD法で形成する多結晶シリコンの面方位異方性
は、多結晶シリコンの堆積温度に依存する。ただし、多
結晶シリコンの堆積温度については、550”C以下で
は堆積速度がきわめて遅く実用的でなくかつアモーフ7
ス状態とな9百方位は決まらず、又750°C以上では
、堆積速度が速すぎ、厚み等の再現性に欠は不都合とな
シ、550°C〜750°Cの温度範囲で堆積すること
が望ましい。第3図にその例を示す。たとえば、6oo
°C近辺で堆積した多結晶シリコンの面方位は殆んど(
1’10)面を示し、又、700’C近辺の温度では、
(100)面の成長異方性を示す。したがつて、あらか
じめ所望とする面方位の多結晶シリコン島を上記の方法
で成長異方性を利用して形成しておけば、レーザ照射に
より形成した単結晶シリコン島の面方位を決定できる。
The plane orientation anisotropy of polycrystalline silicon formed by the LPCVD method depends on the deposition temperature of polycrystalline silicon. However, with regard to the deposition temperature of polycrystalline silicon, if the deposition temperature is below 550"C, the deposition rate is extremely slow and is not practical.
The deposition rate is too fast and the reproducibility of thickness etc. is poor at temperatures above 750°C. This is desirable. An example is shown in FIG. For example, 6oo
Most of the plane orientations of polycrystalline silicon deposited near °C are (
1'10) surface, and at a temperature around 700'C,
It shows the growth anisotropy of the (100) plane. Therefore, if a polycrystalline silicon island with a desired plane orientation is formed in advance by the above method using growth anisotropy, the plane orientation of a single crystal silicon island formed by laser irradiation can be determined.

第4図には、多結晶シリコン島3の形状を変えた場合の
他の実施例を平面図として示している。
FIG. 4 shows a plan view of another embodiment in which the shape of the polycrystalline silicon island 3 is changed.

第4図の(alは、A部がレーザビームLのビーム径よ
シ大きくしており、A部で成長した結晶粒はレーザビー
ム照射端の未照射多結晶シリコンを種として成長してい
る。ただしこのときのレーザビームLはシリコン島3の
C部は完全に溶融できるような位置に走査されることが
必要である。第4図の(b)では、シリコン島3の狭部
Bに続(A、C部にテーパを設けである例である。又、
第4図の(C)。
(al in FIG. 4) is such that the beam diameter of the A section is larger than that of the laser beam L, and the crystal grains grown in the A section grow using the unirradiated polycrystalline silicon at the laser beam irradiation end as seeds. However, the laser beam L at this time needs to be scanned to a position where the C part of the silicon island 3 can be completely melted. (This is an example where parts A and C are tapered. Also,
Figure 4 (C).

(d)はシリコン島3の狭部が一方の側に寄っている例
を示す。
(d) shows an example in which the narrow portion of the silicon island 3 is closer to one side.

発明の効果 本発明は、絶縁物上にエネルギービーム照射によシ単結
晶の半導体層を形成するとき、より完全な再結晶化島を
形成でき、上記単結晶化半導体層の面方位を所望の方位
に形成可能とするもので、上記単結晶化半導体島にトラ
ンジスタなどの素子を形成し、高性能SOIデバイスを
実現することを可能ならしめるものである。
Effects of the Invention According to the present invention, when a single crystal semiconductor layer is formed on an insulator by energy beam irradiation, more perfect recrystallized islands can be formed, and the plane orientation of the single crystal semiconductor layer can be adjusted to a desired direction. This makes it possible to form elements such as transistors on the single-crystal semiconductor island to realize a high-performance SOI device.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の説明図であり、同図の(a
)はシリコン島の平面図、同図の(b)は0のXX/線
断面図、同図(C)はレーザ照射によシ形成した再結晶
化シリコン島の概念図、第2図はSi○2上全面のシリ
コン層をレーザ照射により再結晶化したときの結晶粒形
成の概念図で同図の(a)は試料の断面図、同図の(b
)は平面図、第3図はLPCVD法によシ形成した多結
晶シリコン層の成長温度による成長面方位異方性を示す
グラフ、第4図(−)〜(d)は本発明の他の実施例の
概念を示す平面図である。 1・・・・・シリコンウェハ、2・・・・・・5102
.3・・・・・・多結晶シリコン島、3′・・・・・・
再結晶化シリコン島、L・・・・・・レーザビーム、A
・・・・・・シリコン島のビーム入口側部分、B・・・
・・・シリコン島の狭部、C・・・・・・シリコン島の
ビーム出口側部分。 特許出願人 工業技術院長 川 1)裕 部第1図 第2図 第3図           (υ tP(VDとよるりS古品シ1月ンの鑵積漬&(oc+
(dl 図
FIG. 1 is an explanatory diagram of one embodiment of the present invention, and (a
) is a plan view of a silicon island, (b) is a cross-sectional view taken along the line XX/0, (c) is a conceptual diagram of a recrystallized silicon island formed by laser irradiation, and Figure 2 is a diagram of a silicon island formed by laser irradiation. ○2 Conceptual diagram of crystal grain formation when the silicon layer on the entire surface is recrystallized by laser irradiation. (a) in the same figure is a cross-sectional view of the sample, (b) in the same figure
) is a plan view, FIG. 3 is a graph showing the growth plane orientation anisotropy depending on the growth temperature of a polycrystalline silicon layer formed by the LPCVD method, and FIGS. FIG. 2 is a plan view showing the concept of the embodiment. 1...Silicon wafer, 2...5102
.. 3... Polycrystalline silicon island, 3'...
Recrystallized silicon island, L... Laser beam, A
...Beam entrance side part of silicon island, B...
...Narrow part of the silicon island, C...Beam exit side part of the silicon island. Patent applicant: Director of the Agency of Industrial Science and Technology Kawa 1) Hirobe Figure 1 Figure 2 Figure 3
(dl figure

Claims (3)

【特許請求の範囲】[Claims] (1)半導体基板上の絶縁膜上に絶縁物に囲まれた非単
結晶半導体島を形成し、前記半導体島にエネルギービー
ムを照射して前記半導体島を溶融し、再結晶化するに際
し、前記半導体島の平面形状が少なくとも一か所以上の
前記エネルギービームのビーム径よりも巾の狭い狭部を
有しており、かつ、前記半導体島の一方の端部から前記
狭部を通って他方の端部に走査しながら前記エネルギー
ビームを照射することを特徴とする半導体装置の製造方
法。
(1) When forming a non-single crystal semiconductor island surrounded by an insulator on an insulating film on a semiconductor substrate, and melting and recrystallizing the semiconductor island by irradiating the semiconductor island with an energy beam, The planar shape of the semiconductor island has at least one narrow portion having a width narrower than the beam diameter of the energy beam, and the semiconductor island has a narrow portion having a width narrower than the beam diameter of the energy beam, and the semiconductor island passes from one end of the semiconductor island through the narrow portion to the other side. A method of manufacturing a semiconductor device, characterized in that the energy beam is irradiated while scanning an end portion.
(2)非単結晶半導体の島は、減圧化学蒸着法により、
550℃〜750℃の温度範囲で堆積された多結晶シリ
コン膜から形成されることを特徴とする特許請求の範囲
第1項に記載の半導体装置の製造方法。
(2) Non-single-crystal semiconductor islands are formed by low-pressure chemical vapor deposition.
2. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is formed from a polycrystalline silicon film deposited at a temperature range of 550°C to 750°C.
(3)エネルギービームの走査方向に対して、半導体島
の狭部より手前の部分の島の巾が前記エネルギービーム
の巾よりも広く、かつ前記狭部より後方の部分が前記エ
ネルギービームの幅より狭い平面形状の島であることを
特徴とする特許請求の範囲第1項に記載の半導体装置の
製造方法。
(3) With respect to the scanning direction of the energy beam, the width of the semiconductor island in the part before the narrow part is wider than the width of the energy beam, and the part behind the narrow part is wider than the width of the energy beam. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the island is a narrow planar island.
JP16944684A 1984-08-15 1984-08-15 Manufacture of semiconductor device Pending JPS6147627A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16944684A JPS6147627A (en) 1984-08-15 1984-08-15 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16944684A JPS6147627A (en) 1984-08-15 1984-08-15 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6147627A true JPS6147627A (en) 1986-03-08

Family

ID=15886749

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16944684A Pending JPS6147627A (en) 1984-08-15 1984-08-15 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6147627A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01276615A (en) * 1988-04-27 1989-11-07 Seiko Epson Corp Manufacture of semiconductor device
JPH0287555U (en) * 1988-12-20 1990-07-11
JP2005347765A (en) * 1999-08-31 2005-12-15 Sharp Corp Semiconductor device and manufacturing method therefor, and method of forming silicon thin film
JP2007067431A (en) * 2001-08-30 2007-03-15 Sharp Corp Semiconductor device
JP2007227960A (en) * 2001-08-30 2007-09-06 Sharp Corp Method of manufacturing semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01276615A (en) * 1988-04-27 1989-11-07 Seiko Epson Corp Manufacture of semiconductor device
JPH0287555U (en) * 1988-12-20 1990-07-11
JP2005347765A (en) * 1999-08-31 2005-12-15 Sharp Corp Semiconductor device and manufacturing method therefor, and method of forming silicon thin film
JP2007067431A (en) * 2001-08-30 2007-03-15 Sharp Corp Semiconductor device
JP2007227960A (en) * 2001-08-30 2007-09-06 Sharp Corp Method of manufacturing semiconductor device
JP4663615B2 (en) * 2001-08-30 2011-04-06 シャープ株式会社 Semiconductor device

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