JPS59139622A - Manufacture of stacked semiconductor device - Google Patents
Manufacture of stacked semiconductor deviceInfo
- Publication number
- JPS59139622A JPS59139622A JP58012932A JP1293283A JPS59139622A JP S59139622 A JPS59139622 A JP S59139622A JP 58012932 A JP58012932 A JP 58012932A JP 1293283 A JP1293283 A JP 1293283A JP S59139622 A JPS59139622 A JP S59139622A
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- crystal
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- single crystal
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02433—Crystal orientation
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02595—Microstructure polycrystalline
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02609—Crystal orientation
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
- H01L21/02683—Continuous wave laser beam
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02689—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02691—Scanning of a beam
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- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は一般に三次元ＩＣとして知られている積層型半
導体装置の製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a stacked semiconductor device generally known as a three-dimensional IC.
従来例の構成とその問題点
三次元ＩＣといわれる積層型半導体装置における積層型
単結晶を形成する製造方法については。The structure of a conventional example and its problems This section describes a manufacturing method for forming a stacked single crystal in a stacked semiconductor device called a three-dimensional IC.
ここ数年来、多くの提案がなされている。以下に。Many proposals have been made over the past few years. less than.
これら技術について簡単に説明を行うと共に、問題とな
っている点を挙げる。We will briefly explain these technologies and point out the problems they pose.
島状多結晶のビームアニール法は、絶縁基板（例えば５
１０２や５ｉ３Ｎ４）上に通常の蝕刻法などで多結晶半
導体島を形成し、ビームアニール−（ＣＷやパルスレー
ザ、電子ビームなど）法により、単結晶化ないし大結晶
粒化した結晶島を形成する技術である。この方法にてか
なり良好な単結晶島が得られているが、種結晶がないた
め結晶の核形成制御が困難なことから、結晶方位の制御
は難しい。The beam annealing method for island-like polycrystals is performed using an insulating substrate (for example, 5
102 or 5i3N4) by a normal etching method, and a beam annealing method (CW, pulsed laser, electron beam, etc.) to form a single crystal or large crystal grain crystal island. It's technology. Although fairly good single-crystal islands have been obtained using this method, since there is no seed crystal, it is difficult to control crystal nucleation, making it difficult to control crystal orientation.
種結晶を用いない結晶化の方法として、グラフオ・エピ
タキシー法が提案されており、ＫＣｌの水溶液からの単
結晶成長ではいくつかの成功例が報告されている。しか
しながらＳＬなどの半導体膜の結晶化については、満足
な結果は得られておらず、半導体素子をつくり込むに足
る技術にまでなり得ていない。A grapheo-epitaxy method has been proposed as a crystallization method that does not use a seed crystal, and several successful examples of single crystal growth from an aqueous solution of KCl have been reported. However, satisfactory results have not been obtained regarding the crystallization of semiconductor films such as SL, and the technology has not yet become sufficient for fabricating semiconductor devices.
ブリッジングエピタキシー法やンーディッドビームアニ
ーリング法においては、種結晶としての半導体基板の開
口部よシ結晶成長が生ずるために。In the bridging epitaxy method and the direct beam annealing method, crystal growth occurs from the opening of the semiconductor substrate as a seed crystal.
結晶方位が制御されると同時に前述の多結晶島のビーム
アニール法と同様に良好な結晶が得られ易いことが知ら
れている。しかし、開口部より周辺に結晶成長が生ずる
ため、開口部を中心に、菊花状に単結晶がバラバラに成
長し完全な単結晶が得られないし、開口部周辺の絶縁膜
上べ結晶が成長してゆく時に結晶欠陥や乱れが生じ易い
などの欠点が指摘されており、大面積化には困難である
。It is known that while the crystal orientation is controlled, it is easy to obtain good crystals as in the aforementioned polycrystalline island beam annealing method. However, since crystal growth occurs in the periphery of the opening, single crystals grow apart in a chrysanthemum shape around the opening, making it impossible to obtain a perfect single crystal, and crystals grow on top of the insulating film around the opening. It has been pointed out that there are drawbacks such as crystal defects and disorder easily occurring during the process, making it difficult to increase the area.
発明の目的
本発明は、特定の面方位を用いたンーディノドビームア
ニーリング法により結晶の核形成を行うとともに、結晶
の成長し易い方位に長軸を合わせた矩形の絶縁分離され
た島に結晶成長を行わせしむることにより、従来のよう
な欠点をなくし、結晶性のすぐれた半導体の島を形成し
、三次元ＩＣなる積層型半導体装置の優れた製造方法を
提供するものである。Purpose of the Invention The present invention performs crystal nucleation using a neutral beam annealing method using a specific plane orientation, and forms a crystal in a rectangular insulated isolated island whose long axis is aligned with the direction in which the crystal grows easily. By allowing the growth to occur, the drawbacks of the conventional method are eliminated, semiconductor islands with excellent crystallinity are formed, and an excellent method for manufacturing a stacked semiconductor device, which is a three-dimensional IC, is provided.
発明の構成
本発明は、面方位が（１１０）またはそれに近い方位で
ある半導体基板上に絶縁膜を形成し、前記絶縁膜に選択
的に所望の位置に矩形開口部を設けて前記半導体基板表
面を露出せしめ、前記開口部および絶縁膜上に非単結晶
半導体層を形成し、前記開口部を含んで前記非単結晶半
導体層を矩形の完全絶縁分離された島に形成し、このと
き前記非単結晶半導体の矩形島の長軸の方向が（１１１
＞。Structure of the Invention The present invention involves forming an insulating film on a semiconductor substrate having a plane orientation of (110) or close to it, and selectively providing a rectangular opening at a desired position in the insulating film to improve the surface of the semiconductor substrate. a non-single-crystal semiconductor layer is formed on the opening and the insulating film, and the non-single-crystal semiconductor layer including the opening is formed into a rectangular completely insulated island; The direction of the long axis of the rectangular island of the single crystal semiconductor is (111
>.
〈１１２〉またはく１１３〉方向あるいはそれらに近い
方向に平行になるように形成する。しかるのち、前記開
口部の基板を種結晶として前記非単結晶半導体の矩形島
を結晶化させる際に、エネルギービームを前記開口部か
ら前記非単結晶半導体の矩形島に照射し、前記非単結晶
半導体の矩形島全体全結晶面方位が（１１０）またはそ
れに近く矩形島の長軸方向が（１１１）、（１１２）ま
たは〈１１３〉方向あるいはそれらに近い方向と平行と
なる単結晶とする。しかるのち上記の如く完全に結晶面
が制御された半導体の島に通常の半導体素子製造工程に
より半導体素子を形成するものである。It is formed parallel to the <112> or <113> direction or a direction close to them. Thereafter, when crystallizing the rectangular island of the non-single crystal semiconductor using the substrate in the opening as a seed crystal, an energy beam is irradiated from the opening onto the rectangular island of the non-single crystal semiconductor, and the rectangular island of the non-single crystal semiconductor is The whole rectangular island of the semiconductor is a single crystal whose total crystal plane orientation is (110) or close to it and the long axis direction of the rectangular island is parallel to (111), (112) or <113> direction or a direction close to them. Thereafter, a semiconductor element is formed on the semiconductor island whose crystal plane has been completely controlled as described above by a normal semiconductor element manufacturing process.
実施例の説明
丑す、本発明のもととなった本発明者らの検討結果を第
１図、第２図とともに説明する。第１図は周辺および底
面部全域が完全絶縁分離されている非単結晶シリコン島
をレーザ照射して再結晶化する状態を示したものである
。DESCRIPTION OF EMBODIMENTS The study results of the present inventors, which are the basis of the present invention, will be explained with reference to FIGS. 1 and 2. FIG. 1 shows a state in which a non-single-crystal silicon island whose periphery and entire bottom area are completely insulated and isolated is recrystallized by laser irradiation.
第１図ａは完全絶縁分離された非単結晶シリコン島の試
料の断面構造を示す。シリコン基板１上に８１０２を形
成したのち、非単結晶（多結晶）シリコンを形成して、
通常の選択酸化法を応用して５ｉ０２などの絶縁物２１
で周辺を囲まれた非単結晶シリコンの島５を形成する。FIG. 1a shows the cross-sectional structure of a sample of a completely insulated non-single crystal silicon island. After forming 8102 on the silicon substrate 1, non-single crystal (polycrystalline) silicon is formed,
Insulators 21 such as 5i02 by applying the usual selective oxidation method
An island 5 of non-single-crystal silicon is formed.
かくの如き方法にて形成した完全絶縁分離した非単結晶
シリコン島５の周辺の長軸の一辺のみを含んでレーザビ
ームを一回だけ走査した場合の平面概念図全第１図のｂ
に示す。２１は周囲のＳｉＯ２であり、４１はし一ザビ
ームのビーム径であり、レーザビームの走査は矢印で示
しである。５１は非単結晶シリコン島６のうちのレーザ
が照射された部分である。A conceptual plan view of the case where the laser beam is scanned only once, including only one side of the long axis of the periphery of the completely insulated non-single crystal silicon island 5 formed by such a method.
Shown below. 21 is the surrounding SiO2, 41 is the beam diameter of the single laser beam, and the scanning of the laser beam is indicated by an arrow. Reference numeral 51 indicates a portion of the non-single crystal silicon island 6 that is irradiated with the laser.
第１図のＣは、レーザ照射後の非単結晶シリコン島のレ
ーザ照射部分５１の再結晶化の状態と島５の非照射部を
示す平面概念図である。この図から明らかなごとく、レ
ーザ照射部分５１には非単結晶シリコン島６の未照射非
単結晶シリコンを種とした小さな結晶粒Ｅ５１Ｂが多数
レーザビーム周辺部で形成され、結晶粒５１Ａが成長し
ながら周辺５ｉＯｚの島境界５１Ｇまで伸びている。FIG. 1C is a conceptual plan view showing the state of recrystallization of the laser-irradiated portion 51 of the non-single-crystal silicon island after laser irradiation and the non-irradiated portion of the island 5. FIG. As is clear from this figure, in the laser irradiated portion 51, many small crystal grains E51B seeded with unirradiated non-single crystal silicon of the non-single crystal silicon island 6 are formed around the laser beam, and crystal grains 51A grow. However, it extends to the island boundary 51G with a surrounding area of 5iOz.
また、第１図のｄの平面概念図を示すように。Also, as shown in the conceptual plan view of d in FIG.
多結晶シリコン島５の巾より大きい径を有するレーザビ
ーム４１を矢印の方向に走査し、１回のレーザビームの
走査で上記シリコン島５を完全に熔融させると、この結
果、再結晶化したシリコン島５１は第１図のｅに示すよ
うにいくつかの大きな結晶粒で構成されていることが判
明した。When the laser beam 41 having a diameter larger than the width of the polycrystalline silicon island 5 is scanned in the direction of the arrow and the silicon island 5 is completely melted with one laser beam scan, as a result, the recrystallized silicon is It was found that the island 51 was composed of several large crystal grains, as shown in FIG. 1e.
第１図Ｃ，ｅの結果から、再結晶化シリコン島５１と５
ｉＯ２２１との境界６１ｃでは新たな結晶核形成は生じ
ていないことがわかった。したがって、完全絶縁分離さ
れた非単結晶シリコン島をレーザ照射によって再結晶化
して大結晶粒化せしむるとき、一旦あるところに結晶核
が形成されるとその核が大きく成長して島全体が大結晶
粒の集合・体になり、さらに、この核が成長し易い方位
を有している場合は島全体が完全な単結晶となり得るこ
とが推察される。From the results shown in Fig. 1C and e, recrystallized silicon islands 51 and 5
It was found that no new crystal nucleation occurred at the boundary 61c with iO221. Therefore, when a completely insulated non-single crystal silicon island is recrystallized by laser irradiation to form large crystal grains, once a crystal nucleus is formed in a certain place, that nucleus grows large and the entire island becomes large. It is inferred that the island becomes an aggregate/body of large crystal grains, and if the nucleus has an orientation that facilitates growth, the entire island can become a complete single crystal.
第２図はＳｉＯ２上に周囲を絶縁分離しない非単結晶シ
リコン膜を形成し、この膜の一部をレーザ照射して結晶
化した場合を示す。すなわち、第２図は、第２図のａに
断面を示す試料、たとえば単結晶シリコン基板１上に５
ｉ０２２を形成したのちたとえばＬＰＧＶＤ法により多
結晶シリコン膜３をたとえは０．６μｍ形成した試料に
、ＣＷＡｒレーザ４をたとえば１ｍ／ＳｅＣの速度で走
査しながら照射した場合の観察結果を述べたものである
・第２図のｂは、前記レーザ照射を１回だけ走査した後
の前記試料を上からみた場合の概念図金示す。FIG. 2 shows a case where a non-single-crystal silicon film is formed on SiO2 without insulation isolation, and a part of this film is crystallized by laser irradiation. That is, FIG. 2 shows a sample whose cross section is shown in FIG.
This paper describes the observation results when a sample in which a polycrystalline silicon film 3 of, for example, 0.6 μm is formed by LPGVD after forming i022 is irradiated with a CWAr laser 4 while scanning at a speed of, for example, 1 m/SeC. Figure 2b shows a conceptual diagram of the sample viewed from above after the laser irradiation has been scanned only once.
３はレーザが照射されていない多結晶シリコン膜であり
、３１はレーザ４が照射されたことにより前記多結晶シ
リコン３が大結晶化した再結晶化領域である。なおレー
ザ４の走査方向は矢印で示す方向である。前記再結晶化
領域３１の結晶粒の大きさおよび並び方の観察結果の概
念図を第２図のＣに示す。再結晶化領域３１の周辺部で
は、多結晶シリコン３を種として種々の結晶面、方向を
有する微小な結晶粒３１ｃが多数発生している。周辺部
から中央部に近ずくに従って結晶粒３１Ｂは次第に大き
くなり、成長し易い方位の結晶粒が残ってくる。そして
、レーザビ７ム走査の中央部では、長さ数１ｏ○μｍに
も及ぶ大結晶粒３１Ａが形成されることが判明した。そ
して、ここで観察される大結晶粒３１Ａの面方位は（１
１ｏ）面であり、レーザ走査方向に沿った成長方向は（
１１１：）。3 is a polycrystalline silicon film that is not irradiated with the laser, and 31 is a recrystallized region where the polycrystalline silicon 3 is largely crystallized by being irradiated with the laser 4. Note that the scanning direction of the laser 4 is the direction shown by the arrow. A conceptual diagram of the observation results of the size and arrangement of crystal grains in the recrystallized region 31 is shown in FIG. 2C. In the periphery of the recrystallized region 31, many fine crystal grains 31c having various crystal planes and directions are generated using polycrystalline silicon 3 as seeds. The crystal grains 31B gradually become larger from the periphery toward the center, and crystal grains with orientations that are easy to grow remain. It was also found that large crystal grains 31A having a length of several tens of micrometers were formed in the center of the laser beam scan. The plane orientation of the large crystal grains 31A observed here is (1
1o) plane, and the growth direction along the laser scanning direction is (
111:).
く２１１）または（３１１）などの方位が多く観察され
た。Orientations such as (211) or (311) were often observed.
したがって、第２図のａに示される断面構造を有する試
料の多結晶シリコンのレーザ照射による再結晶化に際し
、大結晶化し易い結晶は、面方位が（１１０）で、方向
が（１１１）、（２１１’）。Therefore, when recrystallizing polycrystalline silicon of a sample having the cross-sectional structure shown in FIG. 211').
（３１１）であることがわかる。(311).
以上の第１．第２図の結果より、たとえばＳｉＯ２で底
面及び周辺を完全に囲まれた多結晶シリコン島をレーザ
を走査しながら照射して単結晶イヒする場合、単結晶化
に最も適した結晶方位は１置方位が（１１ｏ）でレーザ
走査方向が（１１１）。Above 1st. From the results shown in Figure 2, for example, when a polycrystalline silicon island whose bottom and periphery are completely surrounded by SiO2 is irradiated with a scanning laser to ignite a single crystal, the most suitable crystal orientation for single crystallization is 1 position. The orientation is (11o) and the laser scanning direction is (111).
〈１１２〉またけ（１１３）方向に近いように制御する
ことが望ましいと首える。It seems desirable to control the angle so that it is close to the <112> straddle (113) direction.
本発明は、以上の検討にもとつくもので、下地基板とし
て面方位か（１１０）面またはそれに近い単結晶半導体
を用い、レーザの照射の走査方向を（１１１）、（１１
２）または〈１１３〉とすることにより良好な再結晶化
を達成するものである。The present invention is based on the above studies, and uses a single crystal semiconductor with a (110) plane or a plane close to it as a base substrate, and the scanning direction of laser irradiation is set to (111), (110), or (110).
2) or <113>, good recrystallization can be achieved.
以下に、〜実施例にかかる積層型半導体ＩＣの製造工程
を第３図、第４図に従って説明する。The manufacturing process of the stacked semiconductor IC according to the embodiments will be described below with reference to FIGS. 3 and 4.
第３図のａに断面構造を示すように、半導体素子（図示
せず）が作シ込まれた面方位が（１１ｏ）の単結晶シリ
コン基板１０表面部分に選択的に下地酸化膜２を形成し
、たとえば２Ｑ×２０μｍの開口部１１を設け、基板面
を露出せしめる。しかるのち全面にたとえば多結晶シリ
コン膜３を０．３〜１．０μｍの厚さに形成する。この
形成方法は、プラズマＣＶＤ 、ＬＰＧＶＤなどいずれ
でも適宜用いてよい。As shown in the cross-sectional structure of FIG. For example, an opening 11 of 2Q×20 μm is provided to expose the substrate surface. Thereafter, a polycrystalline silicon film 3, for example, is formed to a thickness of 0.3 to 1.0 μm over the entire surface. As this forming method, any of plasma CVD, LPGVD, etc. may be used as appropriate.
この後、第３図のｂに断面構造を尽すように、多結晶シ
リコン膜３を、たとえば周囲を５ｉ０２２１で囲って完
全絶縁分離して、上記、基板面と下地酸化膜２の開口部
１１を介して多結晶シリ−コン膜３が接している部分を
含んで、たとえば巾５０μｍ長さ２００／１ｍの大きさ
で、長軸方向か下地基板の＜１１１＞方向に平行である
矩形の多結晶シリコン島５を形成する。上記多結晶シリ
コン島５を形成する方法は、通常の選択酸化法を用いて
もよいし、多結晶シリコン膜を選択エツチングして、多
結晶シリコン島６を形成したのち周囲を５ｉＯｚ２１で
囲んでもよいことは言う丑でもない。Thereafter, the polycrystalline silicon film 3 is completely insulated by surrounding it with, for example, 5i0221 so that the cross-sectional structure is shown in FIG. A rectangular polycrystal having a width of 50 μm and a length of 200/1 m, for example, and parallel to the major axis direction or the <111> direction of the base substrate, including the part where the polycrystalline silicon film 3 is in contact with the polycrystalline silicon film 3. A silicon island 5 is formed. The method for forming the polycrystalline silicon island 5 may be to use a normal selective oxidation method, or to form the polycrystalline silicon island 6 by selectively etching the polycrystalline silicon film, and then surrounding the polycrystalline silicon island 6 with 5iOz21. There's no need to say that.
第３図のＣは、かぐの如き方法にて形成した多結晶シリ
コン島５の平面概念図である。破線で囲んだ開口部１１
で、基板シリコン１と多結晶シリコン島６は接している
。この後、９００℃、３０分の焼鈍を加え、上記多結晶
シリコン層の安定化処理を行ってもよい。FIG. 3C is a conceptual plan view of the polycrystalline silicon island 5 formed by the Kaguno-like method. Opening 11 surrounded by broken lines
The substrate silicon 1 and the polycrystalline silicon island 6 are in contact with each other. Thereafter, the polycrystalline silicon layer may be stabilized by annealing at 900° C. for 30 minutes.
次に、この半導体基板をたとえば真空吸着ステージに載
せ、４５０°Ｃに加熱しながら、ＧＷ−Ａｒレーザビー
ム４１を照射した。レーザ出力は約１８Ｗ、ビーム径約
８０μｍ ＋走査速度１ ｒｎ／ ｓｅａ ＋ビーム走
査の重ね合わせは約３０％とした。走査は第３図のｄの
矢印×の如く、多結晶シリコン島６の長軸方向にほぼ平
行で走査した。このときレーザビーム径は多結晶シリコ
ン島５の巾５０μｍに比べて十分太きいため、レーザビ
ームの一回の走査で多結晶シリコン島５は全て溶融する
。レーザ照射の結果、多結晶シリコン島らは、面方位が
（１１０）面で矩形の長軸が（１１，１）方向である完
全単結晶の島５１になった。Next, this semiconductor substrate was placed on, for example, a vacuum suction stage, and GW-Ar laser beam 41 was irradiated while heating it to 450°C. The laser output was about 18 W, the beam diameter was about 80 μm, the scanning speed was 1 rn/sea, and the beam scanning overlap was about 30%. The scanning was performed almost parallel to the long axis direction of the polycrystalline silicon island 6, as indicated by the arrow x in d in FIG. At this time, since the laser beam diameter is sufficiently larger than the width of polycrystalline silicon island 5 of 50 μm, polycrystalline silicon island 5 is entirely melted by one scan of the laser beam. As a result of the laser irradiation, the polycrystalline silicon islands became perfect single crystal islands 51 with a (110) plane and a rectangular long axis in the (11,1) direction.
第３図ｄは、多結晶シリコン島５がレーザ照射により再
結晶化して、開口部１１の基板面を種にして矢印Ｙの方
向に沿って（１１０）面の結晶５１が島全体に形成され
単結晶シリコン島５１が形成遅れる過程の断面由造伺を
示す。FIG. 3d shows that the polycrystalline silicon island 5 is recrystallized by laser irradiation, and a (110)-plane crystal 51 is formed over the entire island along the direction of arrow Y using the substrate surface of the opening 11 as a seed. A cross-sectional view of the process in which the formation of a single-crystal silicon island 51 is delayed is shown.
第３図のｅはこのとき形成された再結晶化島５１の平面
概念図を示す。レーザービーム４１が矢印の方向から走
査され、熔融して再結晶τｔたシリコン島５１は、開口
部１１の下地基板を糧２して、面方位が（１１０）で長
軸が〈１１１〉方向である完全単結晶化シリコン島とな
っている。FIG. 3e shows a conceptual plan view of the recrystallized island 51 formed at this time. The laser beam 41 is scanned from the direction of the arrow, and the silicon island 51, which has been melted and recrystallized τt, has a surface orientation of (110) and a long axis in the <111> direction, using the underlying substrate of the opening 11 as a source. It is a completely single-crystal silicon island.
かくして得られた単結晶シリコン島５１に通常の半導体
素子の製造方法を用いて素子を形成し、積層型ＩＣを作
製する。Elements are formed on the thus obtained single crystal silicon island 51 using a normal semiconductor element manufacturing method to produce a stacked IC.
完全絶縁分離された矩形の多結晶シリコン島を形成する
場合の（１１０）シリコン基板１でのファセット〈イ１
０）及び（１１１）の各方向の位置関係の概略の平面図
を第４図に示す。破線で示す矩形は多結晶シリコン島５
のシリコン基板１に対する位置の例を示す。面方位（１
１０）でオリエンテーションフラット７ｋ＜ｊｌｏ〉方
向にとったとき、〈１１１〉方向は図に示すように＜ｊ
ｌ；＞、＜１１１＞、（１イ１＞、＜１ｉｉ＞の４方向
があり、矩形島６の長軸２＜１′１Ｔ ＞ 。Facets of (110) silicon substrate 1 when forming a rectangular polycrystalline silicon island with complete insulation isolation
A schematic plan view of the positional relationship in each direction of 0) and (111) is shown in FIG. The rectangle indicated by the broken line is the polycrystalline silicon island 5
An example of the position of 1 with respect to the silicon substrate 1 is shown. Surface orientation (1
10), when the orientation flat 7k is taken in the <jlo> direction, the <111> direction is <j as shown in the figure.
There are four directions: l;>, <111>, (1i1>, and <1ii>), and the long axis 2<1'1T> of the rectangular island 6.
〈１１１〉の方向に平行に揃えるかまたは＜１１１）、
＜１ｉ’ｉ）の方向に平行に揃えるように、島５をパタ
ーン形成すればよい。このとき角度の関係は、たとえば
オリエンテーションフラット方向（ｊ １ｏ）と（ｊｌ
；）の角度はほぼ３詔である。Align parallel to the <111> direction or <111),
The islands 5 may be patterned so as to be aligned parallel to the direction <1i'i). At this time, the angle relationship is, for example, the orientation flat direction (j 1o) and (jl
;) angle is approximately 3 imperial powers.
なお、島５の長軸方向は、＜ｊ １；＞ 、（ｊｌｌ）
。Note that the long axis direction of the island 5 is <j 1;>, (jll)
.
（１１１）、（１１１）に対して±５°程度以内であれ
ば、結晶の成長しやすさは変らずこの程度ずれていても
良い。(111), (111) may be within ±5° without changing the ease of crystal growth.
また、矩形島の長軸は〈１１１〉方向に限らず（１１２
：＞±５ あるいは＜１１３＞±５の方向に平行にした
場合も良好な単結晶島が得られた。Furthermore, the long axis of the rectangular island is not limited to the <111> direction (112
Good single crystal islands were also obtained when parallel to the direction of :>±5 or <113>±5.
すなわち、本発明においては、面方位（１１０）で長軸
方向が＜１１２＞あるいは＜１１３＞方向寸たほそれら
に近い方向でもよい。That is, in the present invention, the plane orientation (110) and the major axis direction may be in the <112> or <113> direction, so that the direction is close to the <112> or <113> direction.
さらに、本発明において面方位（１１０）についても、
±５ 程度ずれてもよい。捷た、本発明は、種結晶とし
て１層目の半導体基板上に形成された２層目の半導体結
晶を用いることもできることはいうまでもなく、形成さ
れた単結晶層を順次種とすることにより、完全に面方位
が揃った任意の半導体単結晶の多層構造を実現すること
ができる。また、本発明においてはレーザ以外に電子ビ
ーム、赤外線ビーム等を用いてもよい。Furthermore, regarding the plane orientation (110) in the present invention,
It may deviate by about ±5. It goes without saying that in the present invention, the second layer semiconductor crystal formed on the first layer semiconductor substrate can be used as a seed crystal, and the formed single crystal layers can be sequentially used as a seed. Accordingly, it is possible to realize a multilayer structure of an arbitrary semiconductor single crystal with completely aligned plane orientations. Further, in the present invention, an electron beam, an infrared beam, etc. may be used in addition to a laser.
発明の効果 以上の説明で明らかなように、本発明により。Effect of the invention As is clear from the above description, according to the present invention.
（１１０）面に完全に面方位の揃った単結晶半導体島が
実現でき、高性能三次元ＩＣを提供することができる。It is possible to realize a single-crystal semiconductor island whose plane orientation is perfectly aligned in the (110) plane, and to provide a high-performance three-dimensional IC.
第１図は多結晶シリコン高音ＣＷレーザビームで一回走
査して再結晶化した状態を示し、 ｆａンはレーザ照射
部の断面図、同（ｂ）、 （Ｃ）はレーザビームが矩形
シリコン島の長軸の一辺のみを含んで照射された場合を
示す平面概念寵、同（ｄ） 、 （ｅ）は、レーザビー
ムの一回の走査で矩形シリコン島が完全に熔融するよう
に照射した場合の平面工程図、第２図は５ｉ０２上の多
結晶シリコンをＣＷレーザビームで−回走前して再結晶
化した状態を示し、（ａ）はレー１□□８．。７つＩえ
、６゜５）。７−□−４□８． 第の走査方向の平面
概念図、同（Ｃ）は同（ｂ）の拡大詳細説明図、第３図
はレーザ照射による単結晶化の本発明の一実施例を示す
工程図で、（ａ） 、（ｂ） 、Ｃｄ）は断（ＣＬ）
面図、（Ｃ）、 Ｃｅ’）は平面図、第４図は（１１０
）面の面方位ヲ有し―オリエンテーションフラットが（
ｉ １ｏ）面である基板面における（１１１）のそれぞ
れの方向を示す概念図である。
１−＝下地単結晶パ１”′基板・２°−°−Ｔ地
。ｂ２ＳｉＯ２，３・・・・・・多結晶シリコン層、４
・・・・・・レーザビーム、５・・・・・・非単結晶シ
リコン島＋１１・・・・・・下紳５ｉ０２の開口部、２
１・・・・・・絶縁分離周辺ＳｉＯ２，４１・・・・・
レーザビーム、６１ ・・・・再結晶化シリコン島。
特許萬願人 工業技術院長 石 坂 誠 −（Ｃ）
１図
第１図
？ｆ
第２図Figure 1 shows the recrystallized state of polycrystalline silicon after one scan with a high-pitched CW laser beam.Fan is a cross-sectional view of the laser irradiated area, and (b) and (C) show that the laser beam is recrystallized on a rectangular silicon island. (d) and (e) show the case where the rectangular silicon island is irradiated so that it is completely melted by one scan of the laser beam. FIG. 2 shows the state in which polycrystalline silicon on 5i02 is recrystallized by a CW laser beam, and (a) is a planar process diagram of laser 1□□8. . 7 Ie, 6゜5). 7-□-4□8. (C) is an enlarged detailed explanatory view of (B), and FIG. 3 is a process diagram showing an embodiment of the present invention for single crystallization by laser irradiation. , (b), Cd) are cross-sectional views (CL), (C), Ce') are plan views, and Fig. 4 is (110
) has the plane orientation of the plane - the orientation flat is (
FIG. 3 is a conceptual diagram showing each direction of (111) on the substrate surface which is the i1o) plane. 1-=base single-crystal PA1''' substrate, 2°-°-T base
. b2SiO2,3... Polycrystalline silicon layer, 4
...Laser beam, 5...Non-single crystal silicon island +11...Opening of bottom 5i02, 2
1...Insulating isolation surrounding SiO2,41...
Laser beam, 61... Recrystallized silicon island. Patent applicant Makoto Ishizaka, Director of the Agency of Industrial Science and Technology - (C) Figure 1 Figure 1? f Figure 2
Claims (1)
表面上の絶縁膜を選択的に除去して開口部を設けて前記
半導体表面の一部を露出させる工程（１１２）ｉたは（
１１３）の方向あるいはそれらに近い方向に平行な矩形
の絶縁分離された島状に形成する工程と、前記島状の非
単結晶半導体にエネルギービームを照射して結晶化する
工程と。 前記結晶化された半導体の島に半導体素子を形成する工
程とを備えたことを特徴とする積層型半導体装置の製造
方法。[Claims] A step (112) of selectively removing an insulating film on a semiconductor surface having a (1,10) plane or a plane orientation close to it to provide an opening and exposing a part of the semiconductor surface. I was (
113), or a step of forming a rectangular insulated and isolated island parallel to the direction of 113) or a direction close to the direction, and a step of crystallizing the island-shaped non-single crystal semiconductor by irradiating it with an energy beam. A method for manufacturing a stacked semiconductor device, comprising the step of forming a semiconductor element on the crystallized semiconductor island.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58012932A JPS59139622A (en) | 1983-01-31 | 1983-01-31 | Manufacture of stacked semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58012932A JPS59139622A (en) | 1983-01-31 | 1983-01-31 | Manufacture of stacked semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59139622A true JPS59139622A (en) | 1984-08-10 |
| JPS6362088B2 JPS6362088B2 (en) | 1988-12-01 |
Family
ID=11819063
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58012932A Granted JPS59139622A (en) | 1983-01-31 | 1983-01-31 | Manufacture of stacked semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59139622A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9666493B2 (en) | 2015-06-24 | 2017-05-30 | International Business Machines Corporation | Semiconductor device structure with 110-PFET and 111-NFET curent flow direction |
-
1983
- 1983-01-31 JP JP58012932A patent/JPS59139622A/en active Granted
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9666493B2 (en) | 2015-06-24 | 2017-05-30 | International Business Machines Corporation | Semiconductor device structure with 110-PFET and 111-NFET curent flow direction |
| US9761499B2 (en) | 2015-06-24 | 2017-09-12 | International Business Machines Corporation | Semiconductor device structure with 110-PFET and 111-NFET current flow direction |
| US9947689B2 (en) | 2015-06-24 | 2018-04-17 | International Business Machines Corporation | Semiconductor device structure with 110-PFET and 111-NFET current flow direction |
| US10177169B2 (en) | 2015-06-24 | 2019-01-08 | International Business Machines Corporation | Semiconductor device structure with 110-PFET and 111-NFET current flow direction |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6362088B2 (en) | 1988-12-01 |
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