JPS6041236A - Connecting method of electronic part - Google Patents
Connecting method of electronic partInfo
- Publication number
- JPS6041236A JPS6041236A JP58149892A JP14989283A JPS6041236A JP S6041236 A JPS6041236 A JP S6041236A JP 58149892 A JP58149892 A JP 58149892A JP 14989283 A JP14989283 A JP 14989283A JP S6041236 A JPS6041236 A JP S6041236A
- Authority
- JP
- Japan
- Prior art keywords
- stitch
- bond
- bonding
- pellet
- ball
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48471—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
- H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
- H01L2224/48477—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding)
- H01L2224/48478—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball
- H01L2224/48479—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85009—Pre-treatment of the connector or the bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85009—Pre-treatment of the connector or the bonding area
- H01L2224/85051—Forming additional members, e.g. for "wedge-on-ball", "ball-on-wedge", "ball-on-ball" connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85986—Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】 不発′明は、電子装置等の電子部品接続方法に関する。[Detailed description of the invention] The uninvented invention relates to a method for connecting electronic components such as electronic devices.
従来、電子装置等の組立工程は絶線基板上に導電パター
ン、抵抗体等で電気回路を形成した回路基板に、Ｉｌｏ
、 Ｔｒ、抵抗、コンデンサ等のベレットをマウントし
、各ベレットと導電パターン、導電パターン間の接続を
ワイヤーホンディングにて行っている。通常の＠続は各
ベレット側にボールボンドを行い引Ｕ１．き導電パター
ンにステッチボンドを行うが、この２９゛電パターン灯
印刷等により形成し、焼Ｉ５（、１′る為、導電パター
ン表面に酸化物、その仙異物が付着しゃすく又導電パタ
ーン表面に凹凸、及び印刷ダレによる中央剖と周辺部の
高さのバラツキが凌）す、ステッチボンドでのワイヤー
と導電パターンとの＆続面積により、ステッチ側のポン
チｆング強度に影唾を及はす。例えば印刷ダレの部分に
ステッチボンドカニ行われるとワイヤーと導電パターン
の接続面積が極端に小さくなり、ステッチボンド強度ズ
Ｉ９非常に低くなり、最悪の場合接続不可が発生する問
題があった。Conventionally, in the assembly process of electronic devices, etc., Ilo
Bullets such as transistors, resistors, capacitors, etc. are mounted, and the connections between each bullet, conductive patterns, and conductive patterns are made by wire bonding. The usual @continuation is to make a ball bond on each bullet side and pull U1. Stitch bonding is performed on the conductive pattern, but since it is formed by printing with a 29゛ electric pattern lamp, etc., and is baked I5 (1'), oxides and their foreign substances may adhere to the surface of the conductive pattern. The punching strength on the stitch side is affected by the area of contact between the wire and the conductive pattern in the stitch bond, which is overcome by unevenness and variations in height at the center and periphery due to printing sag. . For example, if a stitch bond is applied to a portion where the printing sag, the connection area between the wire and the conductive pattern becomes extremely small, and the stitch bond strength (I9) becomes extremely low.In the worst case, there is a problem that connection is impossible.
本発明の目的は上記欠点全除去し、回路基板にマウント
したＩｌｏ、Ｔｒ低抵抗コンデンサ等と回路基板の導電
パターンとのワイヤーボンディングＶこよる接続が確実
に行え、ボンディング不良発生率が非常に低く、シめ・
もベレットとベレットの接続をも可能とする電子部品の
接続方法を提供することにある。The purpose of the present invention is to eliminate all of the above-mentioned drawbacks, to ensure the connection between Ilo, Tr low resistance capacitors, etc. mounted on a circuit board and the conductive pattern of the circuit board by wire bonding, and to reduce the incidence of bonding failures to a very low level. , Shime・
Another object of the present invention is to provide a method for connecting electronic components that also enables the connection of bellets.
本発明の電子部品の接続方法は、絶縁基板上に導電パン
ーン抵抗体吟で電気回路を形成り、ｆｃ回晶基板にＪ
／Ｃ，’ｒｒ、抵抗等のベレットをマウントし、ワイヤ
ーボンディングにてべ１ノツトと導管パターン、ベレ？
、 ）とベレットの接続を行う工程において、ステッチ
ボンド１則に矛）ら力４じめホ−ルボンドにより金ＰＩ
７！を形成１−１、次にペレット上にボールボンド伊、
前記金座上にステッチボンド箋・行い。ベレットと導電
１パターン及びベレットとベレットの接続を行うことを
傷°徴とする。The method of connecting electronic components of the present invention includes forming an electric circuit using a conductive pan-resistance material on an insulating substrate, and forming an electric circuit on an FC crystal substrate using
/C, 'rr, mount the resistor, etc., and use wire bonding to connect the bellet and conduit pattern, and attach the bellet.
In the process of connecting the bullet with the stitch bond, the gold PI is
7! Form 1-1, then ball bond it on the pellet,
Stitch bond note/do on the gold seat. Symptoms of damage include a conductive pattern between the pellets and a connection between the pellets.
つぎに本発明全実施例により説明する。第１図から第３
図は、本ジと明の一実絹例ケ説明する為の平面図、断面
図である。Next, all embodiments of the present invention will be explained. Figures 1 to 3
The figures are a plan view and a cross-sectional view for explaining examples of real and Ming silk.
まず第１図に示すようにセラミック、プラスチック等で
作らｔた絶縁基板１に印刷等により導１１゛パターン２
、抵抗体３を形成１７に回路基板９にＩ １０．ベレッ
ト４．５をマウントし７、第’ ２ ＩＩＩ、第３図に
示すよう１６４％パターン２及びＩ１０ペレット４のス
テッチボンド位置（工゛あらかじめボールボンドにより
金座６、やび６′全形成（−１次Ｋ Ｔ／Ｃベレット５
にポールトンドア 、４ Ｘｉ：パタ−７２（１）上に
形成した金座６の上にステッチボンド８を行い第２＋＊
ｌＺ“）ようｔζ接続し、他ワイヤーも同様に順次接ｌ
またを行う。さらｆで第３図に七十ようにＩ／Ｃペレッ
）５、（τボールボンド７’Ｔｈ行いＩ／Ｃペレット４
に形成した金座６′の一ヒにステッチボンド８′を行う
。First, as shown in FIG. 1, a conductor pattern 2 is printed on an insulating substrate 1 made of ceramic, plastic, etc.
, resistor 3 is formed on circuit board 9 at 17. I10. Mount pellet 4.5 and stitch bond position of 164% pattern 2 and I10 pellet 4 as shown in Figure 3. -1st K T/C Beret 5
Poulton door, 4 Xi: Stitch bond 8 is made on the gold seat 6 formed on the putter 72 (1) and the second +*
Connect tζ like lZ") and connect other wires in the same way.
Do it again. Furthermore, at f, perform I/C pellet 5, (τ ball bond 7'Th as shown in Figure 3) and I/C pellet 4.
A stitch bond 8' is applied to one of the metal pads 6' formed in the above.
以上プｆ明したように木ｉキ明によれは従栄の回路基板
上のＴ／ＣＸＴｒ抵抗等のベレット導電パターンの接糸
光において（１ステーＩチ（１１１のポンデイングを行
う前（で、ボールボンドにより導電パターン上に金座を
形成１１７、その後この金座上にステッチボンドを行う
ことにより、導電パターン表面状態の影響が少なくなり
ステ・ソチボンド強Ｖの向上と安定が実現できボンディ
ング不良率が非常に低くなる。As explained above, the method for attaching a bullet conductive pattern such as a T/CXTr resistor on a circuit board of a conventional circuit board (before performing the bonding of 1st stage 1), By forming a gold pad on the conductive pattern by ball bonding 117 and then performing stitch bonding on this gold pad, the influence of the surface condition of the conductive pattern is reduced, improving and stabilizing the Ste-Sochi bond strength V and reducing the bonding defect rate. becomes very low.
又Ｉ／Ｃ，Ｔｒ、携抗等のベレットｉｈ’ｌ接わｎの場
合、ステッチ側の金座により、ベレット表面より高くで
き、ワイヤーのエツジタッチの問題解決と在り従来以上
の高密度実装が併せて実現できる効果が得らｒ、る。In addition, in the case of bullet IH'L joints such as I/C, Tr, and portable terminals, the metal pad on the stitch side can be made higher than the surface of the bullet, which solves the problem of wire edge touch, and allows for higher density mounting than before. The effects that can be achieved can be obtained.
第１図かられ３図は本発明の一実施例を部７、明する為
の平面図及び１ｍ曲図である。
なお図に丸・いて、１・・・・・・絶降基板、２・・・
・・・導電パターン、３・・・・−・抵抗Ｋ、４．５・
・・・−・Ｉ／Ｃペレッ）、６．６’・・・・・・金！
、７．７’・・・・・・ホールボンド、８．８′・・・
・−・ステッチホント、９・・・・・・回路基板、であ
る。
５−
ター
一
寿／図 も２図
第、３ 図Figures 1 to 3 are a plan view and a 1m curved view for explaining part 7 of an embodiment of the present invention. In addition, the circles in the figure indicate 1... the bottom-down board, 2...
...Conductive pattern, 3...--Resistance K, 4.5.
...-I/C Peret), 6.6'...Gold!
, 7.7'...Hole bond, 8.8'...
・-・Stitch Honestly, 9・・・・・・Circuit board. 5- Kazutoshi Taro/Figures 2 and 3
Claims (1)
板に電子部品をマウントし、ワイヤーボンティングにて
接続を行う工程において、ステッチボンド側にあらかじ
めボールボンドにより金座を形成し、次に前記電子部品
上にボールボンド後、前記金座上にステッチボンドを行
うことを％徽とする電子部品の接続方法。In the process of mounting electronic components on a circuit board with conductive patterns, resistors, etc. formed on an insulating substrate and connecting them by wire bonding, a metal pad is formed in advance on the stitch bond side by ball bonding, and then the A method for connecting electronic components, which comprises performing ball bonding on the electronic component and then stitch bonding on the metal pad.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58149892A JPS6041236A (en) | 1983-08-17 | 1983-08-17 | Connecting method of electronic part |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58149892A JPS6041236A (en) | 1983-08-17 | 1983-08-17 | Connecting method of electronic part |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6041236A true JPS6041236A (en) | 1985-03-04 |
Family
ID=15484905
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58149892A Pending JPS6041236A (en) | 1983-08-17 | 1983-08-17 | Connecting method of electronic part |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6041236A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0266952A (en) * | 1988-09-01 | 1990-03-07 | Japan Radio Co Ltd | Thick film hybrid integrated circuit |
| JPH02114545A (en) * | 1988-10-24 | 1990-04-26 | Toshiba Corp | Connection of wire bonding |
| US5292050A (en) * | 1991-12-06 | 1994-03-08 | Kabushuki Kaisha Toshiba | Wire bonder |
| WO1994022166A1 (en) * | 1993-03-19 | 1994-09-29 | National Semiconductor Corporation | A method of and arrangement for bond wire connecting together certain integrated circuit components |
| WO1998021780A3 (en) * | 1996-11-11 | 1998-06-25 | Siemens Ag | A connection between two contacts and a process for producing such a connection |
| JP2014120702A (en) * | 2012-12-19 | 2014-06-30 | Azbil Corp | Wire bonding method |
-
1983
- 1983-08-17 JP JP58149892A patent/JPS6041236A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0266952A (en) * | 1988-09-01 | 1990-03-07 | Japan Radio Co Ltd | Thick film hybrid integrated circuit |
| JPH02114545A (en) * | 1988-10-24 | 1990-04-26 | Toshiba Corp | Connection of wire bonding |
| US5292050A (en) * | 1991-12-06 | 1994-03-08 | Kabushuki Kaisha Toshiba | Wire bonder |
| WO1994022166A1 (en) * | 1993-03-19 | 1994-09-29 | National Semiconductor Corporation | A method of and arrangement for bond wire connecting together certain integrated circuit components |
| WO1998021780A3 (en) * | 1996-11-11 | 1998-06-25 | Siemens Ag | A connection between two contacts and a process for producing such a connection |
| JP2014120702A (en) * | 2012-12-19 | 2014-06-30 | Azbil Corp | Wire bonding method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6041236A (en) | Connecting method of electronic part | |
| JPH0394460A (en) | Semiconductor device and manufacture thereof | |
| JPS5914693A (en) | Method of producing printed substrate unit | |
| JP3453663B2 (en) | Surface mount type semiconductor device | |
| JP2652222B2 (en) | Substrate for mounting electronic components | |
| JP3895020B2 (en) | Method for forming conductive bump | |
| JPH0751807Y2 (en) | Flexible circuit board | |
| JPH0558678B2 (en) | ||
| JPH0739258Y2 (en) | Terminal structure at board edge | |
| JP2523209Y2 (en) | Hybrid integrated circuit | |
| JPS6025910Y2 (en) | semiconductor equipment | |
| JPS5958848A (en) | Manufacture of ceramic wiring board | |
| JP2782374B2 (en) | Electronic component mounting apparatus and manufacturing method thereof | |
| JPH03116797A (en) | Thick film surface package circuit | |
| JPH04186321A (en) | Connection structure body of circuit | |
| JPH0265147A (en) | Ic chip mounting method | |
| JPS5848441A (en) | Electron circuit device | |
| JPH04111460A (en) | Hybrid integrated circuit device | |
| JPS6276744A (en) | Vessel for integrated circuit | |
| JPH06151494A (en) | Wire bonding method of hybrid integrated circuit and chip-like body for wire bonding used therefor | |
| JPS6113650A (en) | Hybrid integrated circuit device | |
| JPH05211380A (en) | Mounting structure of electronic part | |
| JP2001237534A (en) | Electronic component mounting method and substrate for mounting electronic component | |
| JPH01313948A (en) | Thin film circuit board and manufacture thereof | |
| JPS6189642A (en) | Manufacture of hybrid integrated circuit |