JP2014120702A - Wire bonding method - Google Patents

Wire bonding method Download PDF

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JP2014120702A
JP2014120702A JP2012276637A JP2012276637A JP2014120702A JP 2014120702 A JP2014120702 A JP 2014120702A JP 2012276637 A JP2012276637 A JP 2012276637A JP 2012276637 A JP2012276637 A JP 2012276637A JP 2014120702 A JP2014120702 A JP 2014120702A
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electrode pad
wire
semiconductor element
capillary
electrode
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Satoshi Suetaka
聡 末高
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Azbil Corp
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Azbil Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48095—Kinked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
    • H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
    • H01L2224/48477—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding)
    • H01L2224/48478—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball
    • H01L2224/48479—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301—Capillary
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512—Aligning
    • H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518—Translational movements
    • H01L2224/85181—Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512—Aligning
    • H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518—Translational movements
    • H01L2224/85186—Translational movements connecting first outside the semiconductor or solid-state body, i.e. off-chip, reverse stitch
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852—Applying energy for connecting
    • H01L2224/85201—Compression bonding
    • H01L2224/85205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a wire bonding method capable of reducing occurrence of failures of semiconductor element.SOLUTION: A first electrode pad 21 on a first semiconductor element 2 is subjected to ball bonding. A second electrode pad 31 on a second semiconductor element 3 is stitch bonded onto a bump 13. Since a capillary 10 is not pressed directly to the first electrode pad 21 nor the second electrode pad 31, occurrence of failures in the first semiconductor element 2 and second semiconductor element 3 can be reduced.

Description

本発明は、ワイヤボンディング方法に関するものである。   The present invention relates to a wire bonding method.

従来より、半導体装置の電極パッド間の結線にワイヤボンディング方法が用いられている。例えば、特許文献１には、基板上に実装されたセンサチップ上の電極パッドに結線するワイヤボンディング方法が開示されている。このワイヤボンディング方法について図３Ａ〜図３Ｅを参照して以下に説明する。   Conventionally, a wire bonding method has been used for connection between electrode pads of a semiconductor device. For example, Patent Document 1 discloses a wire bonding method for connecting to electrode pads on a sensor chip mounted on a substrate. This wire bonding method will be described below with reference to FIGS. 3A to 3E.

まず、図３Ａに示すように、トーチ電極（不図示）からの放電によってキャピラリ１００先端部の開口部から露出したワイヤ１０１の先端部に金属ボール１０２を成形する。そして、図３Ｂに示すように、キャピラリ１００を下降させて、基板２００上に形成された電極２１０にワイヤ１０１の先端の金属ボール１０２を押し付けて、超音波振動を加えながら金属ボール１０２を電極２１０に固着させるボールボンディングを行う。次に、図３Ｃに示すように、キャピラリ１００を基板２００上に実装された半導体素子２２０の高さよりも少し高い位置まで上昇させながら、半導体素子２２０の上方まで移動させる。この後、図３Ｄに示すように、キャピラリ１００を下降させて半導体素子２２０の上面に形成された上面電極２２１に押し当て、所定の荷重を掛けると同時に超音波振動を加えワイヤ１０１を上面電極２２１に固着させるスティッチボンディングを行う。そして、図３Ｅに示すように、ワイヤ１０１をクランプした状態でキャピラリ１００を上方に移動させて、ワイヤ１０１を切断する。これにより、基板２００上に形成された電極２１０と、基板２００上に実装された半導体素子２２０上面の上面電極２２１とが、ワイヤ１０１により結線されることとなる。   First, as shown in FIG. 3A, a metal ball 102 is formed on the tip of the wire 101 exposed from the opening of the tip of the capillary 100 by discharge from a torch electrode (not shown). Then, as shown in FIG. 3B, the capillary 100 is lowered, the metal ball 102 at the tip of the wire 101 is pressed against the electrode 210 formed on the substrate 200, and the metal ball 102 is moved to the electrode 210 while applying ultrasonic vibration. Ball bonding to fix to Next, as shown in FIG. 3C, the capillary 100 is moved to a position above the semiconductor element 220 while being raised to a position slightly higher than the height of the semiconductor element 220 mounted on the substrate 200. Thereafter, as shown in FIG. 3D, the capillary 100 is lowered and pressed against the upper surface electrode 221 formed on the upper surface of the semiconductor element 220, and a predetermined load is applied, and at the same time, ultrasonic vibration is applied to connect the wire 101 to the upper surface electrode 221. Stitch bonding to fix to Then, as shown in FIG. 3E, the capillary 100 is moved upward with the wire 101 clamped, and the wire 101 is cut. As a result, the electrode 210 formed on the substrate 200 and the upper surface electrode 221 on the upper surface of the semiconductor element 220 mounted on the substrate 200 are connected by the wire 101.

特開２００４−１１１６７７号公報JP 2004-1111677 A

しかしながら、上述したワイヤボンディング方法では、半導体素子２２０の上面電極２２１への結線の際、キャピラリ１００を上面電極２２１に直接押し当てて所定の荷重を掛けるとともに超音波振動を与えるスティッチボンディングを行っているので、半導体素子２２０に傷がついたり、半導体素子２２０の機械的な強度が低い場合には半導体素子２２０自体が破損したりするといった不良が発生することがあった。   However, in the wire bonding method described above, when bonding the semiconductor element 220 to the upper surface electrode 221, stitch bonding is performed in which the capillary 100 is directly pressed against the upper surface electrode 221 to apply a predetermined load and to apply ultrasonic vibration. Therefore, there may occur a defect that the semiconductor element 220 is damaged or the semiconductor element 220 itself is damaged when the mechanical strength of the semiconductor element 220 is low.

そこで、本発明は、半導体素子の不良の発生を低減できるワイヤボンディング方法を提供することを目的とする。   Accordingly, an object of the present invention is to provide a wire bonding method that can reduce the occurrence of defects in semiconductor elements.

上述したような課題を解決するために、本発明に係るワイヤボンディング方法は、基板上に搭載された第１の半導体素子上の第１の電極パッドと、基板上に搭載された第２の半導体素子上の第２の電極パッドとの間をキャピラリを用いてワイヤで結線するためのワイヤボンディング方法であって、第２の電極パッド上にバンプを形成する第１のステップと、ワイヤを第１の電極パッドにボールボンディングする第２のステップと、一端が第１の電極パッドにボールボンディングされたワイヤを繰り出しながらキャピラリを第２の電極パッド上に移動させる第３のステップと、一端が第１の電極パッドにボールボンディングされたワイヤを、第２の電極上に形成されたバンプ上にスティッチボンディングする第４のステップとを有することを特徴とするものである。   In order to solve the above-described problems, a wire bonding method according to the present invention includes a first electrode pad on a first semiconductor element mounted on a substrate and a second semiconductor mounted on the substrate. A wire bonding method for connecting a second electrode pad on an element with a wire using a capillary, wherein a first step of forming a bump on the second electrode pad, and a wire in the first step A second step of ball bonding to the electrode pad of the second electrode, a third step of moving the capillary onto the second electrode pad while feeding out the wire whose one end is ball bonded to the first electrode pad, and one end of the first step And a fourth step of stitch-bonding the wire ball-bonded to the electrode pad on the bump formed on the second electrode. It is an.

また、本発明に係る他のワイヤボンディング方法は、基板上に搭載された半導体素子上の第１の電極パッドと第２の電極パッドとの間をキャピラリによりワイヤで結線するためのワイヤボンディング方法であって、第２の電極パッド上にバンプを形成する第１のステップと、ワイヤを第１の電極パッドにボールボンディングする第２のステップと、一端が第１の電極パッドにボールボンディングされたワイヤを繰り出しながらキャピラリを第２の電極パッド上に移動させる第３のステップと、一端が第１の電極パッドにボールボンディングされたワイヤを、第２の電極上に形成されたバンプ上にスティッチボンディングする第４のステップとを有することを特徴とするものである。   In addition, another wire bonding method according to the present invention is a wire bonding method for connecting a first electrode pad and a second electrode pad on a semiconductor element mounted on a substrate with a wire using a capillary. A first step of forming a bump on the second electrode pad, a second step of ball bonding the wire to the first electrode pad, and a wire having one end ball-bonded to the first electrode pad. A third step of moving the capillary onto the second electrode pad while feeding the wire, and a wire having one end ball-bonded to the first electrode pad is stitch-bonded onto the bump formed on the second electrode. And a fourth step.

本発明によれば、第１の電極パッドはボールボンディングされ、第２の電極パッドはバンプ上にスティッチボンディングされるので、第１，第２の電極パッドの何れもキャピラリが直接押し付けられないので、半導体素子に不良が発生することを低減できる。   According to the present invention, since the first electrode pad is ball-bonded and the second electrode pad is stitch-bonded on the bump, the capillary is not directly pressed on either of the first and second electrode pads. The occurrence of defects in the semiconductor element can be reduced.

図１Ａは、本発明の第１の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 1A is a diagram for explaining a wire bonding method according to a first embodiment of the present invention. 図１Ｂは、本発明の第１の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 1B is a diagram for explaining the wire bonding method according to the first embodiment of the present invention. 図１Ｃは、本発明の第１の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 1C is a diagram for explaining the wire bonding method according to the first embodiment of the present invention. 図１Ｄは、本発明の第１の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 1D is a diagram for explaining the wire bonding method according to the first embodiment of the present invention. 図１Ｅは、本発明の第１の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 1E is a view for explaining the wire bonding method according to the first embodiment of the present invention. 図１Ｆは、本発明の第１の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 1F is a diagram for explaining the wire bonding method according to the first embodiment of the present invention. 図１Ｇは、本発明の第１の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 1G is a diagram for explaining the wire bonding method according to the first embodiment of the present invention. 図１Ｈは、本発明の第１の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 1H is a diagram for explaining the wire bonding method according to the first embodiment of the present invention. 図２Ａは、本発明の第２の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 2A is a diagram for explaining a wire bonding method according to a second embodiment of the present invention. 図２Ｂは、本発明の第２の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 2B is a diagram for explaining a wire bonding method according to a second embodiment of the present invention. 図２Ｃは、本発明の第２の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 2C is a diagram for explaining the wire bonding method according to the second embodiment of the present invention. 図２Ｄは、本発明の第２の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 2D is a diagram for explaining a wire bonding method according to a second embodiment of the present invention. 図２Ｅは、本発明の第２の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 2E is a diagram for explaining a wire bonding method according to a second embodiment of the present invention. 図２Ｆは、本発明の第２の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 2F is a diagram for explaining the wire bonding method according to the second embodiment of the present invention. 図２Ｇは、本発明の第２の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 2G is a diagram for explaining a wire bonding method according to a second embodiment of the present invention. 図２Ｈは、本発明の第２の実施の形態に係るワイヤボンディング方法を説明するための図である。FIG. 2H is a diagram for explaining a wire bonding method according to a second embodiment of the present invention. 図３Ａは、従来のワイヤボンディング方法を説明するための図である。FIG. 3A is a diagram for explaining a conventional wire bonding method. 図３Ｂは、従来のワイヤボンディング方法を説明するための図である。FIG. 3B is a diagram for explaining a conventional wire bonding method. 図３Ｃは、従来のワイヤボンディング方法を説明するための図である。FIG. 3C is a diagram for explaining a conventional wire bonding method. 図３Ｄは、従来のワイヤボンディング方法を説明するための図である。FIG. 3D is a diagram for explaining a conventional wire bonding method. 図３Ｅは、従来のワイヤボンディング方法を説明するための図である。FIG. 3E is a diagram for explaining a conventional wire bonding method.

［第１の実施の形態］
以下、図面を参照して、本発明の第１の実施の形態について詳細に説明する。 [First Embodiment]
Hereinafter, a first embodiment of the present invention will be described in detail with reference to the drawings.

本実施の形態は、基板１上に実装された第１の半導体素子２上面の第１の電極パッド２１と、基板１上に実装された第２の半導体素子３上面の第２の電極パッド３１とをキャピラリ１０を用いてボンディングワイヤ（以下、「ワイヤ」と言う。）１１で結線するものである。ここで、キャピラリは１０は、ワイヤボンディングマシンに搭載され、ワイヤ１１が挿通される筒状の部材なる公知のキャピラリから構成されている。   In the present embodiment, the first electrode pad 21 on the upper surface of the first semiconductor element 2 mounted on the substrate 1 and the second electrode pad 31 on the upper surface of the second semiconductor element 3 mounted on the substrate 1 are used. Are connected by a bonding wire (hereinafter referred to as “wire”) 11 using a capillary 10. Here, the capillary 10 is composed of a known capillary that is mounted on a wire bonding machine and is a cylindrical member into which the wire 11 is inserted.

まず、図１Ａに示すように、トーチ電極(不図示）からの放電によってキャピラリ１０の先端部の開口部から露出したワイヤ１１の先端部に金属ボール１２を成型する。そして、図１Ｂに示すように、キャピラリ１０を下降させて、基板１上の第２の半導体素子３上面に形成された第２の電極パッド３１に、ワイヤ１１の先端の金属ボール１２を押し付けて、超音波振動を加えながら金属ボール１２を第２の電極パッド３１に固着させるボールボンディングを行う。そして、図１Ｃに示すように、ワイヤ１１をクランプした状態でキャピラリ１０を上方に移動させて、ワイヤ１１を切断する。
これにより、第２の電極パッド３１上にはバンプ１３が形成される。 First, as shown in FIG. 1A, a metal ball 12 is formed on the tip of the wire 11 exposed from the opening of the tip of the capillary 10 by discharge from a torch electrode (not shown). Then, as shown in FIG. 1B, the capillary 10 is lowered, and the metal ball 12 at the tip of the wire 11 is pressed against the second electrode pad 31 formed on the upper surface of the second semiconductor element 3 on the substrate 1. Then, ball bonding for fixing the metal ball 12 to the second electrode pad 31 is performed while applying ultrasonic vibration. Then, as shown in FIG. 1C, the capillary 10 is moved upward with the wire 11 clamped, and the wire 11 is cut.
Thereby, the bumps 13 are formed on the second electrode pads 31.

第２の電極パッド３１上にバンプ１３を形成すると、図１Ｄに示すように、キャピラリ１０を基板１上の第１の半導体素子２上面に形成された第１の電極パッド２１上方に移動させる。このとき、トーチ電極(不図示）からの放電によってキャピラリ１０の先端部の開口部から露出したワイヤ１１の先端部に金属ボール１２を成型する。そして、図１Ｅに示すように、キャピラリ１０を下降させて、第１の電極パッド２１にワイヤ１１の先端の金属ボール１４を押し付けて、超音波振動を加えながら金属ボール１４を第１の電極パッド２１に固着させるボールボンディングを行う。   When the bump 13 is formed on the second electrode pad 31, the capillary 10 is moved above the first electrode pad 21 formed on the upper surface of the first semiconductor element 2 on the substrate 1 as shown in FIG. 1D. At this time, a metal ball 12 is formed on the tip of the wire 11 exposed from the opening of the tip of the capillary 10 by discharge from a torch electrode (not shown). Then, as shown in FIG. 1E, the capillary 10 is lowered, the metal ball 14 at the tip of the wire 11 is pressed against the first electrode pad 21, and the metal ball 14 is moved to the first electrode pad while applying ultrasonic vibration. Ball bonding to be fixed to the 21 is performed.

次に、図１Ｆに示すように、キャピラリ１０を上方に移動させた後、第２の半導体素子３１の上方まで移動させる。この後、図１Ｇに示すように、キャピラリ１０を下降させて半導体素子３１の上面に形成された第２の電極パッド３１に押し当て、所定の荷重を掛けると同時に超音波振動を加えワイヤ１１を第２の電極パッド３１に固着させるスティッチボンディングを行う。
このとき、第２の電極パッド３１上には、上述したようにバンプ１３が形成されている。したがって、ワイヤ１１は、バンプ１３に対してスティッチボンディングされ、バンプ１３を介して第２の電極パッド３１に結線されることとなる。このように、第２の電極パッド３１への結線の際、バンプ１３にスティッチボンディングされ、キャピラリ１０が直接に第２の電極パッド３１に押し当てられることがないので、第２の電極パッド３１を備えた第２の半導体素子３に不良が発生することを低減させることができる。 Next, as shown in FIG. 1F, the capillary 10 is moved upward and then moved to above the second semiconductor element 31. Thereafter, as shown in FIG. 1G, the capillary 10 is lowered and pressed against the second electrode pad 31 formed on the upper surface of the semiconductor element 31, and a predetermined load is applied and at the same time, ultrasonic vibration is applied and the wire 11 is moved. Stitch bonding for fixing to the second electrode pad 31 is performed.
At this time, the bumps 13 are formed on the second electrode pads 31 as described above. Therefore, the wire 11 is stitch-bonded to the bump 13 and connected to the second electrode pad 31 via the bump 13. As described above, when the connection to the second electrode pad 31 is performed, the bumps 13 are stitch-bonded and the capillary 10 is not directly pressed against the second electrode pad 31. The occurrence of defects in the provided second semiconductor element 3 can be reduced.

ワイヤ１１がスティッチボンディングされると、図１Ｈに示すように、ワイヤ１１をクランプした状態でキャピラリ１０を上方に移動させて、ワイヤ１１を切断する。
これにより、第１の半導体素子２の第１の電極パッド２１と、第２の半導体素子３の第２の電極パッド３１とがワイヤ１１により結線されることとなる。 When the wire 11 is stitch-bonded, as shown in FIG. 1H, the capillary 10 is moved upward with the wire 11 clamped, and the wire 11 is cut.
As a result, the first electrode pad 21 of the first semiconductor element 2 and the second electrode pad 31 of the second semiconductor element 3 are connected by the wire 11.

以上説明したように、本実施の形態によれば、第１の半導体素子２上の第１の電極パッド２１はボールボンディングされ、第２の半導体素子３上の第２の電極パッド３１はバンプ１３上にスティッチボンディングされるので、第１の電極パッド２１および第２の電極パッド３１の何れもキャピラリ１０が直接押し付けられないので、第１の半導体素子２および第２の半導体素子３に不良が発生することを低減できる。   As described above, according to the present embodiment, the first electrode pad 21 on the first semiconductor element 2 is ball bonded, and the second electrode pad 31 on the second semiconductor element 3 is bump 13. Since the capillaries 10 are not directly pressed by either the first electrode pad 21 or the second electrode pad 31 because the stitch bonding is performed on the top, a defect occurs in the first semiconductor element 2 and the second semiconductor element 3. Can be reduced.

［第２の実施の形態］
次に本発明の第２の実施の形態について詳細に説明する。なお、本実施の形態において、上述した第１の実施の形態と同等の構成要素については、同じ名称および符号を付し適宜説明を省略する。 [Second Embodiment]
Next, a second embodiment of the present invention will be described in detail. In the present embodiment, components equivalent to those in the first embodiment described above are denoted by the same names and reference numerals, and description thereof will be omitted as appropriate.

本実施の形態は、基板１上に実装された半導体素子４上面の第１の電極パッド４１と第２の電極パッド４２とをキャピラリ１０を用いてワイヤ１１で結線するものである。   In the present embodiment, the first electrode pad 41 and the second electrode pad 42 on the upper surface of the semiconductor element 4 mounted on the substrate 1 are connected by the wire 11 using the capillary 10.

まず、図２Ａに示すように、トーチ電極(不図示）からの放電によってキャピラリ１０の先端部の開口部から露出したワイヤ１１の先端部に金属ボール１２を成型する。そして、図２Ｂに示すように、キャピラリ１０を下降させて、基板１上の半導体素子４上面に形成された第２の電極パッド４２に、ワイヤ１１の先端の金属ボール１２を押し付けて、超音波振動を加えながら金属ボール１２を第２の電極パッド４２に固着させるボールボンディングを行う。そして、図２Ｃに示すように、ワイヤ１１をクランプした状態でキャピラリ１０を上方に移動させて、ワイヤ１１を切断する。
これにより、第２の電極パッド４２上にはバンプ１３が形成される。 First, as shown in FIG. 2A, a metal ball 12 is formed on the tip of the wire 11 exposed from the opening of the tip of the capillary 10 by discharge from a torch electrode (not shown). Then, as shown in FIG. 2B, the capillary 10 is lowered, and the metal ball 12 at the tip of the wire 11 is pressed against the second electrode pad 42 formed on the upper surface of the semiconductor element 4 on the substrate 1, and ultrasonic waves are applied. Ball bonding is performed to fix the metal ball 12 to the second electrode pad 42 while applying vibration. Then, as shown in FIG. 2C, the capillary 10 is moved upward while the wire 11 is clamped, and the wire 11 is cut.
As a result, the bump 13 is formed on the second electrode pad 42.

第２の電極パッド４２上にバンプ１３を形成すると、図２Ｄに示すように、キャピラリ１０を半導体素子４上面に形成された第１の電極パッド４１上方に移動させる。このとき、トーチ電極(不図示）からの放電によってキャピラリ１０の先端部の開口部から露出したワイヤ１１の先端部に金属ボール１４を成型する。そして、図２Ｅに示すように、キャピラリ１０を下降させて、第１の電極パッド４１にワイヤ１１の先端の金属ボール１４を押し付けて、超音波振動を加えながら金属ボール１４を第１の電極パッド４１に固着させるボールボンディングを行う。   When the bump 13 is formed on the second electrode pad 42, the capillary 10 is moved above the first electrode pad 41 formed on the upper surface of the semiconductor element 4 as shown in FIG. 2D. At this time, a metal ball 14 is formed on the tip of the wire 11 exposed from the opening of the tip of the capillary 10 by discharge from a torch electrode (not shown). Then, as shown in FIG. 2E, the capillary 10 is lowered, the metal ball 14 at the tip of the wire 11 is pressed against the first electrode pad 41, and the metal ball 14 is moved to the first electrode pad while applying ultrasonic vibration. Ball bonding for fixing to 41 is performed.

次に、図２Ｆに示すように、キャピラリ１０を上方に移動させた後、第２の半導体素子４２の上方まで移動させる。この後、図２Ｇに示すように、キャピラリ１０を下降させて第２の電極パッド４２に押し当て、所定の荷重を掛けると同時に超音波振動を加えワイヤ１１を第２の電極パッド４２に固着させるスティッチボンディングを行う。
このとき、第２の電極パッド４２上には、上述したようにバンプ１３が形成されている。したがって、ワイヤ１１は、バンプ１３に対してスティッチボンディングされ、バンプ１３を介して第２の電極パッド４２に結線されることとなる。このように、第２の電極パッド４２への結線の際、バンプ１３にスティッチボンディングされ、キャピラリ１０が直接に第２の電極パッド４２に押し当てられることがないので、第２の電極パッド４２を備えた半導体素子４に不良が発生することを低減させることができる。 Next, as shown in FIG. 2F, after the capillary 10 is moved upward, it is moved to above the second semiconductor element 42. After that, as shown in FIG. 2G, the capillary 10 is lowered and pressed against the second electrode pad 42, and a predetermined load is applied. At the same time, ultrasonic vibration is applied to fix the wire 11 to the second electrode pad 42. Perform stitch bonding.
At this time, the bumps 13 are formed on the second electrode pads 42 as described above. Therefore, the wire 11 is stitch-bonded to the bump 13 and connected to the second electrode pad 42 via the bump 13. As described above, when the connection to the second electrode pad 42 is performed, the bumps 13 are stitch-bonded and the capillary 10 is not directly pressed against the second electrode pad 42. The occurrence of defects in the semiconductor element 4 provided can be reduced.

ワイヤ１１がスティッチボンディングされると、図２Ｈに示すように、ワイヤ１１をクランプした状態でキャピラリ１０を上方に移動させて、ワイヤ１１を切断する。
これにより、半導体素子４上の第１の電極パッド４１と第２の電極パッド４１とがワイヤ１１により結線されることとなる。 When the wire 11 is stitch-bonded, as shown in FIG. 2H, the capillary 10 is moved upward while the wire 11 is clamped, and the wire 11 is cut.
As a result, the first electrode pad 41 and the second electrode pad 41 on the semiconductor element 4 are connected by the wire 11.

以上説明したように、本実施の形態によれば、半導体素子４上の第１の電極パッド４１はボールボンディングされ、半導体素子４上の第２の電極パッド４１はバンプ１３上にスティッチボンディングされるので、第１の電極パッド４１および第２の電極パッド４２の何れもキャピラリ１０が直接押し付けられないので、半導体素子４に不良が発生することを低減できる。   As described above, according to the present embodiment, the first electrode pad 41 on the semiconductor element 4 is ball-bonded, and the second electrode pad 41 on the semiconductor element 4 is stitch-bonded on the bump 13. Therefore, since neither the first electrode pad 41 nor the second electrode pad 42 is directly pressed against the capillary 10, the occurrence of a defect in the semiconductor element 4 can be reduced.

従来では、スティッチボンディングによる半導体素子への不良の発生を防ぐために、半導体素子間で結線する際に基板上に連結された２つの電極パッドを設け、電極パッドにはスティッチボンディング、半導体素子にはボールボンディングにより、一方の電極パッドと一方の半導体素子、他方の電極パッドと他方の半導体素子を結線することが行われていた。しかしながら、第１，第２の本実施の形態によれば、半導体素子間や電極パッド間で直接に結線することができるので、上述したような連結した２つの電極パッドを基板上に形成しなくて良いので、基板上の省スペース化や作業工程の削減により低コスト化を実現することができる。   Conventionally, in order to prevent occurrence of defects in a semiconductor element due to stitch bonding, two electrode pads connected on a substrate are provided when connecting between semiconductor elements, and stitch bonding is provided on the electrode pad, and ball is provided on the semiconductor element. One electrode pad and one semiconductor element, and the other electrode pad and the other semiconductor element are connected by bonding. However, according to the first and second embodiments, since it is possible to directly connect between semiconductor elements and between electrode pads, it is not necessary to form two connected electrode pads as described above on the substrate. Therefore, the cost can be reduced by saving the space on the substrate and reducing the work process.

本発明は、半導体装置にワイヤボンディングを行う各種装置に適用することができる。   The present invention can be applied to various apparatuses that perform wire bonding on a semiconductor device.

１…基板、２…第１の半導体素子、３…第２の半導体素子、４…半導体素子、１０…キャピラリ、１１…ワイヤ、１２，１４…金属ボール、１３…バンプ、２１，４１…第１の電極パッド、３１，４２…第２の電極パッド。   DESCRIPTION OF SYMBOLS 1 ... Board | substrate, 2 ... 1st semiconductor element, 3 ... 2nd semiconductor element, 4 ... Semiconductor element, 10 ... Capillary, 11 ... Wire, 12, 14 ... Metal ball, 13 ... Bump, 21, 41 ... 1st Electrode pads 31, 42, second electrode pads.

Claims (2)

基板上に搭載された第１の半導体素子上の第１の電極パッドと、前記基板上に搭載された第２の半導体素子上の第２の電極パッドとの間をキャピラリを用いてワイヤで結線するためのワイヤボンディング方法であって、
前記第２の電極パッド上にバンプを形成する第１のステップと、
前記ワイヤを前記第１の電極パッドにボールボンディングする第２のステップと、
一端が前記第１の電極パッドにボールボンディングされた前記ワイヤを繰り出しながら前記キャピラリを前記第２の電極パッド上に移動させる第３のステップと、
一端が前記第１の電極パッドにボールボンディングされた前記ワイヤを、前記第２の電極上に形成された前記バンプ上にスティッチボンディングする第４のステップと
を有することを特徴とするワイヤボンディング方法。 A wire is connected between the first electrode pad on the first semiconductor element mounted on the substrate and the second electrode pad on the second semiconductor element mounted on the substrate using a capillary. A wire bonding method for
A first step of forming a bump on the second electrode pad;
A second step of ball bonding the wire to the first electrode pad;
A third step of moving the capillary onto the second electrode pad while feeding out the wire having one end ball-bonded to the first electrode pad;
And a fourth step of stitch-bonding the wire having one end ball-bonded to the first electrode pad onto the bump formed on the second electrode. 基板上に搭載された半導体素子上の第１の電極パッドと第２の電極パッドとの間をキャピラリによりワイヤで結線するためのワイヤボンディング方法であって、
前記第２の電極パッド上にバンプを形成する第１のステップと、
前記ワイヤを前記第１の電極パッドにボールボンディングする第２のステップと、
一端が前記第１の電極パッドにボールボンディングされた前記ワイヤを繰り出しながら前記キャピラリを前記第２の電極パッド上に移動させる第３のステップと、
一端が前記第１の電極パッドにボールボンディングされた前記ワイヤを、前記第２の電極上に形成された前記バンプ上にスティッチボンディングする第４のステップと
を有することを特徴とするワイヤボンディング方法。 A wire bonding method for connecting a wire between a first electrode pad and a second electrode pad on a semiconductor element mounted on a substrate with a capillary,
A first step of forming a bump on the second electrode pad;
A second step of ball bonding the wire to the first electrode pad;
A third step of moving the capillary onto the second electrode pad while feeding out the wire having one end ball-bonded to the first electrode pad;
And a fourth step of stitch-bonding the wire having one end ball-bonded to the first electrode pad onto the bump formed on the second electrode.
JP2012276637A 2012-12-19 2012-12-19 Wire bonding method Pending JP2014120702A (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6041236A (en) * 1983-08-17 1985-03-04 Nec Corp Connecting method of electronic part
JPH05326601A (en) * 1992-05-18 1993-12-10 Murata Mfg Co Ltd Wire bonding method
JP2006324553A (en) * 2005-05-20 2006-11-30 Renesas Technology Corp Semiconductor device and method of manufacturing same
JP2008034567A (en) * 2006-07-27 2008-02-14 Fujitsu Ltd Semiconductor device and manufacturing method therefor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6041236A (en) * 1983-08-17 1985-03-04 Nec Corp Connecting method of electronic part
JPH05326601A (en) * 1992-05-18 1993-12-10 Murata Mfg Co Ltd Wire bonding method
JP2006324553A (en) * 2005-05-20 2006-11-30 Renesas Technology Corp Semiconductor device and method of manufacturing same
JP2008034567A (en) * 2006-07-27 2008-02-14 Fujitsu Ltd Semiconductor device and manufacturing method therefor

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