JPS60245257A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS60245257A
JPS60245257A JP59100586A JP10058684A JPS60245257A JP S60245257 A JPS60245257 A JP S60245257A JP 59100586 A JP59100586 A JP 59100586A JP 10058684 A JP10058684 A JP 10058684A JP S60245257 A JPS60245257 A JP S60245257A
Authority
JP
Japan
Prior art keywords
heat treatment
semiconductor substrate
cracks
layer
passivation film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59100586A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0224021B2 (enrdf_load_stackoverflow
Inventor
Norio Totsuka
戸塚 憲男
Yasumitsu Sugawara
菅原 安光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP59100586A priority Critical patent/JPS60245257A/ja
Publication of JPS60245257A publication Critical patent/JPS60245257A/ja
Publication of JPH0224021B2 publication Critical patent/JPH0224021B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01022Titanium [Ti]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP59100586A 1984-05-21 1984-05-21 半導体装置の製造方法 Granted JPS60245257A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59100586A JPS60245257A (ja) 1984-05-21 1984-05-21 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59100586A JPS60245257A (ja) 1984-05-21 1984-05-21 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS60245257A true JPS60245257A (ja) 1985-12-05
JPH0224021B2 JPH0224021B2 (enrdf_load_stackoverflow) 1990-05-28

Family

ID=14277984

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59100586A Granted JPS60245257A (ja) 1984-05-21 1984-05-21 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS60245257A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61121456A (ja) * 1984-11-19 1986-06-09 Nippon Denso Co Ltd 半導体素子の突起電極の形成方法
US5393696A (en) * 1990-12-03 1995-02-28 Grumman Aerosace Corp. Method for forming multilayer indium bump contacts

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5133562A (en) * 1974-09-17 1976-03-22 Tokyo Shibaura Electric Co Handotaisochi no seizohoho

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5133562A (en) * 1974-09-17 1976-03-22 Tokyo Shibaura Electric Co Handotaisochi no seizohoho

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61121456A (ja) * 1984-11-19 1986-06-09 Nippon Denso Co Ltd 半導体素子の突起電極の形成方法
US5393696A (en) * 1990-12-03 1995-02-28 Grumman Aerosace Corp. Method for forming multilayer indium bump contacts

Also Published As

Publication number Publication date
JPH0224021B2 (enrdf_load_stackoverflow) 1990-05-28

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