JPS60211557A - ダイレクトメモリアクセス制御回路 - Google Patents

ダイレクトメモリアクセス制御回路

Info

Publication number
JPS60211557A
JPS60211557A JP6865184A JP6865184A JPS60211557A JP S60211557 A JPS60211557 A JP S60211557A JP 6865184 A JP6865184 A JP 6865184A JP 6865184 A JP6865184 A JP 6865184A JP S60211557 A JPS60211557 A JP S60211557A
Authority
JP
Japan
Prior art keywords
data
bit
memory
dma
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6865184A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0330899B2 (enrdf_load_html_response
Inventor
Kiyoshi Kuwazawa
桑澤 清
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Epson Corp
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK, Epson Corp filed Critical Seiko Epson Corp
Priority to JP6865184A priority Critical patent/JPS60211557A/ja
Publication of JPS60211557A publication Critical patent/JPS60211557A/ja
Publication of JPH0330899B2 publication Critical patent/JPH0330899B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP6865184A 1984-04-06 1984-04-06 ダイレクトメモリアクセス制御回路 Granted JPS60211557A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6865184A JPS60211557A (ja) 1984-04-06 1984-04-06 ダイレクトメモリアクセス制御回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6865184A JPS60211557A (ja) 1984-04-06 1984-04-06 ダイレクトメモリアクセス制御回路

Publications (2)

Publication Number Publication Date
JPS60211557A true JPS60211557A (ja) 1985-10-23
JPH0330899B2 JPH0330899B2 (enrdf_load_html_response) 1991-05-01

Family

ID=13379813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6865184A Granted JPS60211557A (ja) 1984-04-06 1984-04-06 ダイレクトメモリアクセス制御回路

Country Status (1)

Country Link
JP (1) JPS60211557A (enrdf_load_html_response)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6448158A (en) * 1987-08-19 1989-02-22 Oki Electric Ind Co Ltd Direct memory access control circuit
JPH01181145A (ja) * 1988-01-13 1989-07-19 Nec Corp Dma転送装置のデータ組立方式

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5585945A (en) * 1978-12-21 1980-06-28 Mitsubishi Electric Corp Memory unit
JPS58114119A (ja) * 1981-12-26 1983-07-07 Fujitsu Ltd デ−タ転送制御方式

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5585945A (en) * 1978-12-21 1980-06-28 Mitsubishi Electric Corp Memory unit
JPS58114119A (ja) * 1981-12-26 1983-07-07 Fujitsu Ltd デ−タ転送制御方式

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6448158A (en) * 1987-08-19 1989-02-22 Oki Electric Ind Co Ltd Direct memory access control circuit
JPH01181145A (ja) * 1988-01-13 1989-07-19 Nec Corp Dma転送装置のデータ組立方式

Also Published As

Publication number Publication date
JPH0330899B2 (enrdf_load_html_response) 1991-05-01

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term