JPS60211557A - ダイレクトメモリアクセス制御回路 - Google Patents
ダイレクトメモリアクセス制御回路Info
- Publication number
- JPS60211557A JPS60211557A JP6865184A JP6865184A JPS60211557A JP S60211557 A JPS60211557 A JP S60211557A JP 6865184 A JP6865184 A JP 6865184A JP 6865184 A JP6865184 A JP 6865184A JP S60211557 A JPS60211557 A JP S60211557A
- Authority
- JP
- Japan
- Prior art keywords
- data
- bit
- memory
- dma
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6865184A JPS60211557A (ja) | 1984-04-06 | 1984-04-06 | ダイレクトメモリアクセス制御回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6865184A JPS60211557A (ja) | 1984-04-06 | 1984-04-06 | ダイレクトメモリアクセス制御回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60211557A true JPS60211557A (ja) | 1985-10-23 |
JPH0330899B2 JPH0330899B2 (enrdf_load_html_response) | 1991-05-01 |
Family
ID=13379813
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6865184A Granted JPS60211557A (ja) | 1984-04-06 | 1984-04-06 | ダイレクトメモリアクセス制御回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60211557A (enrdf_load_html_response) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6448158A (en) * | 1987-08-19 | 1989-02-22 | Oki Electric Ind Co Ltd | Direct memory access control circuit |
JPH01181145A (ja) * | 1988-01-13 | 1989-07-19 | Nec Corp | Dma転送装置のデータ組立方式 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5585945A (en) * | 1978-12-21 | 1980-06-28 | Mitsubishi Electric Corp | Memory unit |
JPS58114119A (ja) * | 1981-12-26 | 1983-07-07 | Fujitsu Ltd | デ−タ転送制御方式 |
-
1984
- 1984-04-06 JP JP6865184A patent/JPS60211557A/ja active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5585945A (en) * | 1978-12-21 | 1980-06-28 | Mitsubishi Electric Corp | Memory unit |
JPS58114119A (ja) * | 1981-12-26 | 1983-07-07 | Fujitsu Ltd | デ−タ転送制御方式 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6448158A (en) * | 1987-08-19 | 1989-02-22 | Oki Electric Ind Co Ltd | Direct memory access control circuit |
JPH01181145A (ja) * | 1988-01-13 | 1989-07-19 | Nec Corp | Dma転送装置のデータ組立方式 |
Also Published As
Publication number | Publication date |
---|---|
JPH0330899B2 (enrdf_load_html_response) | 1991-05-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP1336972B1 (en) | Method and apparatus for data inversion in a memory device | |
JPS61156358A (ja) | バスコンバータ | |
JPS5925254B2 (ja) | デイジタル・デ−タ処理装置 | |
JPS60211557A (ja) | ダイレクトメモリアクセス制御回路 | |
JPS6118059A (ja) | メモリ回路 | |
JPS581451B2 (ja) | デ−タ転送方式 | |
JPS58134336A (ja) | ワ−ドサ−チ装置 | |
JPS6381557A (ja) | デユアルポ−トメモリ | |
JPS59100931A (ja) | デ−タ転送回路 | |
JP2563807B2 (ja) | ダイレクトメモリアクセス制御回路 | |
JPS6022777B2 (ja) | デ−タ転送方式 | |
JPS59177240U (ja) | 出力回路 | |
JPS5864534A (ja) | コンピユ−タ装置におけるデ−タ転送方式 | |
JPS60224189A (ja) | 記憶回路 | |
JP3442887B2 (ja) | メモリバス制御回路 | |
JPS6369326A (ja) | デ−タ変換装置 | |
JPS61204759A (ja) | 情報処理装置 | |
JPH04333152A (ja) | アドレス発生回路 | |
JPH052549A (ja) | データバスの制御方式 | |
JPH04333954A (ja) | 情報処理装置 | |
JPH0228745A (ja) | バス幅変更回路 | |
JPH01111256A (ja) | スモールコンピュータシステムインターフエイスホストアダプタ装置 | |
JPH039445A (ja) | 記憶素子制御回路 | |
JPS61292739A (ja) | メモリ装置 | |
JPS6336030B2 (enrdf_load_html_response) |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |