JPS6020582A - Ｍｉｓトランジスタ及びその製造方法 - Google Patents

Ｍｉｓトランジスタ及びその製造方法

Info

Publication number
JPS6020582A
JPS6020582A JP58128418A JP12841883A JPS6020582A JP S6020582 A JPS6020582 A JP S6020582A JP 58128418 A JP58128418 A JP 58128418A JP 12841883 A JP12841883 A JP 12841883A JP S6020582 A JPS6020582 A JP S6020582A
Authority
JP
Japan
Prior art keywords
gate
thickness
drain
source
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58128418A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0563948B2 (enExample
Inventor
Masao Fukuma
福間　雅夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58128418A priority Critical patent/JPS6020582A/ja
Publication of JPS6020582A publication Critical patent/JPS6020582A/ja
Publication of JPH0563948B2 publication Critical patent/JPH0563948B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6758—Thin-film transistors [TFT] characterised by the insulating substrates
    • H10D30/6759—Silicon-on-sapphire [SOS] substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes

Landscapes

  • Thin Film Transistor (AREA)
JP58128418A 1983-07-14 1983-07-14 Ｍｉｓトランジスタ及びその製造方法 Granted JPS6020582A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58128418A JPS6020582A (ja) 1983-07-14 1983-07-14 Ｍｉｓトランジスタ及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58128418A JPS6020582A (ja) 1983-07-14 1983-07-14 Ｍｉｓトランジスタ及びその製造方法

Publications (2)

Publication Number Publication Date
JPS6020582A true JPS6020582A (ja) 1985-02-01
JPH0563948B2 JPH0563948B2 (enExample) 1993-09-13

Family

ID=14984265

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58128418A Granted JPS6020582A (ja) 1983-07-14 1983-07-14 Ｍｉｓトランジスタ及びその製造方法

Country Status (1)

Country Link
JP (1) JPS6020582A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63283068A (ja) * 1987-05-14 1988-11-18 Sharp Corp 薄膜トランジスタの製造方法
JPH0298969A (ja) * 1988-10-06 1990-04-11 Agency Of Ind Science & Technol Ｍｏｓトランジスタおよびその製造方法
US5510640A (en) * 1990-04-17 1996-04-23 Cannon Kabushiki Kaisha Semiconductor device and process for preparing the same
FR2799307A1 (fr) * 1999-10-01 2001-04-06 France Telecom Dispositif semi-conducteur combinant les avantages des architectures massives et soi, procede de fabrication

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58158971A (ja) * 1982-03-16 1983-09-21 Seiko Epson Corp 薄膜半導体装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58158971A (ja) * 1982-03-16 1983-09-21 Seiko Epson Corp 薄膜半導体装置

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63283068A (ja) * 1987-05-14 1988-11-18 Sharp Corp 薄膜トランジスタの製造方法
JPH0298969A (ja) * 1988-10-06 1990-04-11 Agency Of Ind Science & Technol Ｍｏｓトランジスタおよびその製造方法
US5510640A (en) * 1990-04-17 1996-04-23 Cannon Kabushiki Kaisha Semiconductor device and process for preparing the same
FR2799307A1 (fr) * 1999-10-01 2001-04-06 France Telecom Dispositif semi-conducteur combinant les avantages des architectures massives et soi, procede de fabrication
WO2001026160A1 (fr) * 1999-10-01 2001-04-12 France Telecom Dispositif semi-conducteur combinant les avantages des architectures massives et soi, et procede de fabrication

Also Published As

Publication number Publication date
JPH0563948B2 (enExample) 1993-09-13

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