JPS60204048A - 仮想記憶方式 - Google Patents

仮想記憶方式

Info

Publication number
JPS60204048A
JPS60204048A JP59058244A JP5824484A JPS60204048A JP S60204048 A JPS60204048 A JP S60204048A JP 59058244 A JP59058244 A JP 59058244A JP 5824484 A JP5824484 A JP 5824484A JP S60204048 A JPS60204048 A JP S60204048A
Authority
JP
Japan
Prior art keywords
address
virtual
real
memory
address translation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59058244A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0353659B2 (enExample
Inventor
Toyofumi Tachibana
立花　豊文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP59058244A priority Critical patent/JPS60204048A/ja
Publication of JPS60204048A publication Critical patent/JPS60204048A/ja
Publication of JPH0353659B2 publication Critical patent/JPH0353659B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP59058244A 1984-03-28 1984-03-28 仮想記憶方式 Granted JPS60204048A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59058244A JPS60204048A (ja) 1984-03-28 1984-03-28 仮想記憶方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59058244A JPS60204048A (ja) 1984-03-28 1984-03-28 仮想記憶方式

Publications (2)

Publication Number Publication Date
JPS60204048A true JPS60204048A (ja) 1985-10-15
JPH0353659B2 JPH0353659B2 (enExample) 1991-08-15

Family

ID=13078702

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59058244A Granted JPS60204048A (ja) 1984-03-28 1984-03-28 仮想記憶方式

Country Status (1)

Country Link
JP (1) JPS60204048A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0546575A3 (enExample) * 1991-12-12 1995-01-18 Nippon Electric Co
EP0650124A1 (en) * 1993-10-20 1995-04-26 Sun Microsystems, Inc. Virtual memory computer system address translation mechanism that supports multiple page sizes
US5426752A (en) * 1989-07-14 1995-06-20 Hitachi, Ltd. Method for allocating real pages to virtual pages having different page sizes therefrom
CN100369015C (zh) * 2004-12-21 2008-02-13 威盛电子股份有限公司 产生具重新对应功能记忆区块的方法及相关的电子系统

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54143028A (en) * 1978-04-28 1979-11-07 Nec Corp Data transfer unit
JPS5919288A (ja) * 1982-07-22 1984-01-31 Toshiba Corp 仮想記憶制御方式

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54143028A (en) * 1978-04-28 1979-11-07 Nec Corp Data transfer unit
JPS5919288A (ja) * 1982-07-22 1984-01-31 Toshiba Corp 仮想記憶制御方式

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5426752A (en) * 1989-07-14 1995-06-20 Hitachi, Ltd. Method for allocating real pages to virtual pages having different page sizes therefrom
EP0546575A3 (enExample) * 1991-12-12 1995-01-18 Nippon Electric Co
EP0650124A1 (en) * 1993-10-20 1995-04-26 Sun Microsystems, Inc. Virtual memory computer system address translation mechanism that supports multiple page sizes
CN100369015C (zh) * 2004-12-21 2008-02-13 威盛电子股份有限公司 产生具重新对应功能记忆区块的方法及相关的电子系统

Also Published As

Publication number Publication date
JPH0353659B2 (enExample) 1991-08-15

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