JPS60198825A - 極微細パタン形成法 - Google Patents

極微細パタン形成法

Info

Publication number
JPS60198825A
JPS60198825A JP5450484A JP5450484A JPS60198825A JP S60198825 A JPS60198825 A JP S60198825A JP 5450484 A JP5450484 A JP 5450484A JP 5450484 A JP5450484 A JP 5450484A JP S60198825 A JPS60198825 A JP S60198825A
Authority
JP
Japan
Prior art keywords
layer
etching
film
substrate
processed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5450484A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0438133B2 (cg-RX-API-DMAC7.html
Inventor
Shigehisa Oki
茂久 大木
Masatoshi Oda
政利 小田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP5450484A priority Critical patent/JPS60198825A/ja
Publication of JPS60198825A publication Critical patent/JPS60198825A/ja
Publication of JPH0438133B2 publication Critical patent/JPH0438133B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • ing And Chemical Polishing (AREA)
  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)
JP5450484A 1984-03-23 1984-03-23 極微細パタン形成法 Granted JPS60198825A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5450484A JPS60198825A (ja) 1984-03-23 1984-03-23 極微細パタン形成法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5450484A JPS60198825A (ja) 1984-03-23 1984-03-23 極微細パタン形成法

Publications (2)

Publication Number Publication Date
JPS60198825A true JPS60198825A (ja) 1985-10-08
JPH0438133B2 JPH0438133B2 (cg-RX-API-DMAC7.html) 1992-06-23

Family

ID=12972457

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5450484A Granted JPS60198825A (ja) 1984-03-23 1984-03-23 極微細パタン形成法

Country Status (1)

Country Link
JP (1) JPS60198825A (cg-RX-API-DMAC7.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1994016854A1 (fr) * 1993-01-19 1994-08-04 Ingenerny Tsentr 'plazmodinamika' Procede de traitement de la surface d'un article et installation pour ce faire

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57118640A (en) * 1981-01-16 1982-07-23 Matsushita Electronics Corp Formation of masking pattern

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57118640A (en) * 1981-01-16 1982-07-23 Matsushita Electronics Corp Formation of masking pattern

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1994016854A1 (fr) * 1993-01-19 1994-08-04 Ingenerny Tsentr 'plazmodinamika' Procede de traitement de la surface d'un article et installation pour ce faire

Also Published As

Publication number Publication date
JPH0438133B2 (cg-RX-API-DMAC7.html) 1992-06-23

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