JPS60142564A - 半導体構造体 - Google Patents

半導体構造体

Info

Publication number
JPS60142564A
JPS60142564A JP59171660A JP17166084A JPS60142564A JP S60142564 A JPS60142564 A JP S60142564A JP 59171660 A JP59171660 A JP 59171660A JP 17166084 A JP17166084 A JP 17166084A JP S60142564 A JPS60142564 A JP S60142564A
Authority
JP
Japan
Prior art keywords
conductivity type
regions
groove
region
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59171660A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0347576B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
デービツド・レオ・バージエロン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS60142564A publication Critical patent/JPS60142564A/ja
Publication of JPH0347576B2 publication Critical patent/JPH0347576B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/60—Lateral BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/177—Base regions of bipolar transistors, e.g. BJTs or IGBTs
    • H10D62/184—Base regions of bipolar transistors, e.g. BJTs or IGBTs of lateral BJTs

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Bipolar Transistors (AREA)
JP59171660A 1983-12-27 1984-08-20 半導体構造体 Granted JPS60142564A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/565,678 US4547793A (en) 1983-12-27 1983-12-27 Trench-defined semiconductor structure
US565678 1983-12-27

Publications (2)

Publication Number Publication Date
JPS60142564A true JPS60142564A (ja) 1985-07-27
JPH0347576B2 JPH0347576B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-07-19

Family

ID=24259659

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59171660A Granted JPS60142564A (ja) 1983-12-27 1984-08-20 半導体構造体

Country Status (4)

Country Link
US (1) US4547793A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
EP (1) EP0150328B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS60142564A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE3474613D1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6373406A (ja) * 1986-09-17 1988-04-04 Sanyo Electric Co Ltd リップルフイルタ

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4914740A (en) * 1988-03-07 1990-04-03 International Business Corporation Charge amplifying trench memory cell
US4970689A (en) * 1988-03-07 1990-11-13 International Business Machines Corporation Charge amplifying trench memory cell
US4929996A (en) * 1988-06-29 1990-05-29 Texas Instruments Incorporated Trench bipolar transistor
US5234861A (en) * 1989-06-30 1993-08-10 Honeywell Inc. Method for forming variable width isolation structures
US5017999A (en) * 1989-06-30 1991-05-21 Honeywell Inc. Method for forming variable width isolation structures
US5248894A (en) * 1989-10-03 1993-09-28 Harris Corporation Self-aligned channel stop for trench-isolated island
US5065217A (en) * 1990-06-27 1991-11-12 Texas Instruments Incorporated Process for simultaneously fabricating isolation structures for bipolar and CMOS circuits
US5952707A (en) * 1997-12-05 1999-09-14 Stmicroelectronics, Inc. Shallow trench isolation with thin nitride as gate dielectric
US6022788A (en) * 1997-12-23 2000-02-08 Stmicroelectronics, Inc. Method of forming an integrated circuit having spacer after shallow trench fill and integrated circuit formed thereby
US6255184B1 (en) 1999-08-30 2001-07-03 Episil Technologies, Inc. Fabrication process for a three dimensional trench emitter bipolar transistor

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3385729A (en) * 1964-10-26 1968-05-28 North American Rockwell Composite dual dielectric for isolation in integrated circuits and method of making
JPS5228550B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1972-10-04 1977-07-27
US3919005A (en) * 1973-05-07 1975-11-11 Fairchild Camera Instr Co Method for fabricating double-diffused, lateral transistor
US4199775A (en) * 1974-09-03 1980-04-22 Bell Telephone Laboratories, Incorporated Integrated circuit and method for fabrication thereof
US4048649A (en) * 1976-02-06 1977-09-13 Transitron Electronic Corporation Superintegrated v-groove isolated bipolar and vmos transistors
DE2605641C3 (de) * 1976-02-12 1979-12-20 Siemens Ag, 1000 Berlin Und 8000 Muenchen Hochfrequenztransistor und Verfahren zu seiner Herstellung
US4137109A (en) * 1976-04-12 1979-01-30 Texas Instruments Incorporated Selective diffusion and etching method for isolation of integrated logic circuit
US4115797A (en) * 1976-10-04 1978-09-19 Fairchild Camera And Instrument Corporation Integrated injection logic with heavily doped injector base self-aligned with injector emitter and collector
FR2410366A1 (fr) * 1977-11-29 1979-06-22 Radiotechnique Compelec Transistor de type mesa et procede de realisation de ce transistor
US4174252A (en) * 1978-07-26 1979-11-13 Rca Corporation Method of defining contact openings in insulating layers on semiconductor devices without the formation of undesirable pinholes
US4283236A (en) * 1979-09-19 1981-08-11 Harris Corporation Method of fabricating lateral PNP transistors utilizing selective diffusion and counter doping
US4242156A (en) * 1979-10-15 1980-12-30 Rockwell International Corporation Method of fabricating an SOS island edge passivation structure
US4373965A (en) * 1980-12-22 1983-02-15 Ncr Corporation Suppression of parasitic sidewall transistors in locos structures
US4419150A (en) * 1980-12-29 1983-12-06 Rockwell International Corporation Method of forming lateral bipolar transistors

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6373406A (ja) * 1986-09-17 1988-04-04 Sanyo Electric Co Ltd リップルフイルタ

Also Published As

Publication number Publication date
DE3474613D1 (en) 1988-11-17
EP0150328A1 (en) 1985-08-07
EP0150328B1 (en) 1988-10-12
JPH0347576B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-07-19
US4547793A (en) 1985-10-15

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