JPS60107146A - Ｌｓｉのデバッグシステム - Google Patents

Ｌｓｉのデバッグシステム

Info

Publication number
JPS60107146A
JPS60107146A JP58214651A JP21465183A JPS60107146A JP S60107146 A JPS60107146 A JP S60107146A JP 58214651 A JP58214651 A JP 58214651A JP 21465183 A JP21465183 A JP 21465183A JP S60107146 A JPS60107146 A JP S60107146A
Authority
JP
Japan
Prior art keywords
chip
evaluation
program
piggyback
hold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58214651A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0246969B2 (OSRAM
Inventor
Hisashi Saito
斉藤　寿士
Mikio Takuwa
宅和　幹雄
Toshibumi Nakai
中井　俊文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP58214651A priority Critical patent/JPS60107146A/ja
Publication of JPS60107146A publication Critical patent/JPS60107146A/ja
Publication of JPH0246969B2 publication Critical patent/JPH0246969B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
JP58214651A 1983-11-14 1983-11-14 Ｌｓｉのデバッグシステム Granted JPS60107146A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58214651A JPS60107146A (ja) 1983-11-14 1983-11-14 Ｌｓｉのデバッグシステム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58214651A JPS60107146A (ja) 1983-11-14 1983-11-14 Ｌｓｉのデバッグシステム

Publications (2)

Publication Number Publication Date
JPS60107146A true JPS60107146A (ja) 1985-06-12
JPH0246969B2 JPH0246969B2 (OSRAM) 1990-10-18

Family

ID=16659290

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58214651A Granted JPS60107146A (ja) 1983-11-14 1983-11-14 Ｌｓｉのデバッグシステム

Country Status (1)

Country Link
JP (1) JPS60107146A (OSRAM)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02123433A (ja) * 1988-11-02 1990-05-10 Nec Corp プログラム開発装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02123433A (ja) * 1988-11-02 1990-05-10 Nec Corp プログラム開発装置

Also Published As

Publication number Publication date
JPH0246969B2 (OSRAM) 1990-10-18

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