JPS5967631A - ウエハ−アライメント方法 - Google Patents

ウエハ−アライメント方法

Info

Publication number
JPS5967631A
JPS5967631A JP57177588A JP17758882A JPS5967631A JP S5967631 A JPS5967631 A JP S5967631A JP 57177588 A JP57177588 A JP 57177588A JP 17758882 A JP17758882 A JP 17758882A JP S5967631 A JPS5967631 A JP S5967631A
Authority
JP
Japan
Prior art keywords
alignment
chip
wafer
window
reticle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57177588A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6258139B2 (enrdf_load_stackoverflow
Inventor
Hiroshi Otsuka
博 大塚
Sunao Nishimuro
直 西室
Hiroyuki Funatsu
舟津　博幸
Yoshio Ito
由夫 伊東
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP57177588A priority Critical patent/JPS5967631A/ja
Publication of JPS5967631A publication Critical patent/JPS5967631A/ja
Publication of JPS6258139B2 publication Critical patent/JPS6258139B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Control Of Position Or Direction (AREA)
JP57177588A 1982-10-12 1982-10-12 ウエハ−アライメント方法 Granted JPS5967631A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57177588A JPS5967631A (ja) 1982-10-12 1982-10-12 ウエハ−アライメント方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57177588A JPS5967631A (ja) 1982-10-12 1982-10-12 ウエハ−アライメント方法

Publications (2)

Publication Number Publication Date
JPS5967631A true JPS5967631A (ja) 1984-04-17
JPS6258139B2 JPS6258139B2 (enrdf_load_stackoverflow) 1987-12-04

Family

ID=16033608

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57177588A Granted JPS5967631A (ja) 1982-10-12 1982-10-12 ウエハ−アライメント方法

Country Status (1)

Country Link
JP (1) JPS5967631A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60108914A (ja) * 1983-11-17 1985-06-14 Nec Corp ペレット位置検出方法およびその装置
JP2006336745A (ja) * 2005-06-01 2006-12-14 Shinko Electric Co Ltd 電磁クラッチ／ブレーキ
US7604099B2 (en) 2004-03-15 2009-10-20 Mitsubishi Electric Corporation Brake device for elevator

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5179582A (en) * 1975-01-07 1976-07-10 Canon Kk Araimentoyokii pataanhogohoho
JPS58159327A (ja) * 1982-03-18 1983-09-21 Oki Electric Ind Co Ltd ウエ−ハアラインメントマ−クの保存方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5179582A (en) * 1975-01-07 1976-07-10 Canon Kk Araimentoyokii pataanhogohoho
JPS58159327A (ja) * 1982-03-18 1983-09-21 Oki Electric Ind Co Ltd ウエ−ハアラインメントマ−クの保存方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60108914A (ja) * 1983-11-17 1985-06-14 Nec Corp ペレット位置検出方法およびその装置
US7604099B2 (en) 2004-03-15 2009-10-20 Mitsubishi Electric Corporation Brake device for elevator
JP2006336745A (ja) * 2005-06-01 2006-12-14 Shinko Electric Co Ltd 電磁クラッチ／ブレーキ

Also Published As

Publication number Publication date
JPS6258139B2 (enrdf_load_stackoverflow) 1987-12-04

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