JPS5960547A - インタ−フエイス変換装置 - Google Patents

インタ−フエイス変換装置

Info

Publication number
JPS5960547A
JPS5960547A JP57168648A JP16864882A JPS5960547A JP S5960547 A JPS5960547 A JP S5960547A JP 57168648 A JP57168648 A JP 57168648A JP 16864882 A JP16864882 A JP 16864882A JP S5960547 A JPS5960547 A JP S5960547A
Authority
JP
Japan
Prior art keywords
data
address
memory
register
bits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57168648A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6218074B2 (enrdf_load_stackoverflow
Inventor
Takayuki Morioka
隆行 森岡
Takeshi Kato
猛 加藤
Seiichi Yasumoto
精一 安元
Masakazu Okada
政和 岡田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57168648A priority Critical patent/JPS5960547A/ja
Publication of JPS5960547A publication Critical patent/JPS5960547A/ja
Publication of JPS6218074B2 publication Critical patent/JPS6218074B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP57168648A 1982-09-29 1982-09-29 インタ−フエイス変換装置 Granted JPS5960547A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57168648A JPS5960547A (ja) 1982-09-29 1982-09-29 インタ−フエイス変換装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57168648A JPS5960547A (ja) 1982-09-29 1982-09-29 インタ−フエイス変換装置

Publications (2)

Publication Number Publication Date
JPS5960547A true JPS5960547A (ja) 1984-04-06
JPS6218074B2 JPS6218074B2 (enrdf_load_stackoverflow) 1987-04-21

Family

ID=15871922

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57168648A Granted JPS5960547A (ja) 1982-09-29 1982-09-29 インタ−フエイス変換装置

Country Status (1)

Country Link
JP (1) JPS5960547A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6227850A (ja) * 1985-07-30 1987-02-05 Fujitsu Ltd 端末制御方法
JPH0291753A (ja) * 1988-09-29 1990-03-30 Toshiba Corp システムバス相互接続方式
JPH1185677A (ja) * 1997-09-11 1999-03-30 Nec Corp バス・インターフェース・ユニット

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
VAX780 HARDWARE HANDBOOK=1979 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6227850A (ja) * 1985-07-30 1987-02-05 Fujitsu Ltd 端末制御方法
JPH0291753A (ja) * 1988-09-29 1990-03-30 Toshiba Corp システムバス相互接続方式
JPH1185677A (ja) * 1997-09-11 1999-03-30 Nec Corp バス・インターフェース・ユニット

Also Published As

Publication number Publication date
JPS6218074B2 (enrdf_load_stackoverflow) 1987-04-21

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