JPS5958851A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS5958851A
JPS5958851A JP57168932A JP16893282A JPS5958851A JP S5958851 A JPS5958851 A JP S5958851A JP 57168932 A JP57168932 A JP 57168932A JP 16893282 A JP16893282 A JP 16893282A JP S5958851 A JPS5958851 A JP S5958851A
Authority
JP
Japan
Prior art keywords
glass
pattern
ceramic
leads
external
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57168932A
Other languages
English (en)
Japanese (ja)
Other versions
JPS638620B2 (enExample
Inventor
Kaoru Tachibana
薫 立花
Masahiro Sugimoto
杉本　正浩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57168932A priority Critical patent/JPS5958851A/ja
Publication of JPS5958851A publication Critical patent/JPS5958851A/ja
Publication of JPS638620B2 publication Critical patent/JPS638620B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07551—Controlling the environment, e.g. atmosphere composition or temperature characterised by changes in properties of the bond wires during the connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP57168932A 1982-09-28 1982-09-28 半導体装置 Granted JPS5958851A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57168932A JPS5958851A (ja) 1982-09-28 1982-09-28 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57168932A JPS5958851A (ja) 1982-09-28 1982-09-28 半導体装置

Publications (2)

Publication Number Publication Date
JPS5958851A true JPS5958851A (ja) 1984-04-04
JPS638620B2 JPS638620B2 (enExample) 1988-02-23

Family

ID=15877214

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57168932A Granted JPS5958851A (ja) 1982-09-28 1982-09-28 半導体装置

Country Status (1)

Country Link
JP (1) JPS5958851A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6437842A (en) * 1987-08-03 1989-02-08 Shinko Electric Ind Co Package for pga type semiconductor device
JPH01117084A (ja) * 1987-10-29 1989-05-09 Nec Corp プラスチックピングリッドアレイパッケージ
US4890152A (en) * 1986-02-14 1989-12-26 Matsushita Electric Works, Ltd. Plastic molded chip carrier package and method of fabricating the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56126951A (en) * 1980-03-12 1981-10-05 Hitachi Ltd Semicondutor device
JPS56137645A (en) * 1980-03-31 1981-10-27 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor device
JPS5759454U (enExample) * 1980-09-26 1982-04-08

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56126951A (en) * 1980-03-12 1981-10-05 Hitachi Ltd Semicondutor device
JPS56137645A (en) * 1980-03-31 1981-10-27 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor device
JPS5759454U (enExample) * 1980-09-26 1982-04-08

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4890152A (en) * 1986-02-14 1989-12-26 Matsushita Electric Works, Ltd. Plastic molded chip carrier package and method of fabricating the same
JPS6437842A (en) * 1987-08-03 1989-02-08 Shinko Electric Ind Co Package for pga type semiconductor device
JPH01117084A (ja) * 1987-10-29 1989-05-09 Nec Corp プラスチックピングリッドアレイパッケージ

Also Published As

Publication number Publication date
JPS638620B2 (enExample) 1988-02-23

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