JPS6437842A - Package for pga type semiconductor device - Google Patents

Package for pga type semiconductor device

Info

Publication number
JPS6437842A
JPS6437842A JP19399287A JP19399287A JPS6437842A JP S6437842 A JPS6437842 A JP S6437842A JP 19399287 A JP19399287 A JP 19399287A JP 19399287 A JP19399287 A JP 19399287A JP S6437842 A JPS6437842 A JP S6437842A
Authority
JP
Japan
Prior art keywords
recessed section
package
semiconductor device
type semiconductor
airtightness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19399287A
Other languages
Japanese (ja)
Inventor
Shigeji Muramatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP19399287A priority Critical patent/JPS6437842A/en
Publication of JPS6437842A publication Critical patent/JPS6437842A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To increase pins while improving airtightness and reliability, and to enhance profitability by welding a lead frame to a ceramic substrate with a recessed section for receiving a semiconductor element by low melting-point glass. CONSTITUTION:A package for a pin grid array (PGA) type semiconductor device having a small mounting area is formed by a ceramic substrate 10 having a recessed section 12 for receiving a semiconductor element and high airtightness. A lead frame 20 is welded to sections except the recessed section 12 in the surface, to which the recessed section 12 is shaped, by low melting- point glass 18, and an internal conductive section is formed without metallizing the substrate 10. According to the constitution, pins are increased while airtightness, reliability and profitability are improved.
JP19399287A 1987-08-03 1987-08-03 Package for pga type semiconductor device Pending JPS6437842A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19399287A JPS6437842A (en) 1987-08-03 1987-08-03 Package for pga type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19399287A JPS6437842A (en) 1987-08-03 1987-08-03 Package for pga type semiconductor device

Publications (1)

Publication Number Publication Date
JPS6437842A true JPS6437842A (en) 1989-02-08

Family

ID=16317168

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19399287A Pending JPS6437842A (en) 1987-08-03 1987-08-03 Package for pga type semiconductor device

Country Status (1)

Country Link
JP (1) JPS6437842A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0342863A (en) * 1989-07-10 1991-02-25 Fujitsu Ltd Semiconductor package
JPH04196253A (en) * 1990-11-28 1992-07-16 Mitsubishi Electric Corp Package for semiconductor device
US5206188A (en) * 1990-01-31 1993-04-27 Ibiden Co., Ltd. Method of manufacturing a high lead count circuit board

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5958851A (en) * 1982-09-28 1984-04-04 Fujitsu Ltd Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5958851A (en) * 1982-09-28 1984-04-04 Fujitsu Ltd Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0342863A (en) * 1989-07-10 1991-02-25 Fujitsu Ltd Semiconductor package
US5206188A (en) * 1990-01-31 1993-04-27 Ibiden Co., Ltd. Method of manufacturing a high lead count circuit board
JPH04196253A (en) * 1990-11-28 1992-07-16 Mitsubishi Electric Corp Package for semiconductor device

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