JPS5957495A - Printed circuit board - Google Patents

Printed circuit board

Info

Publication number
JPS5957495A
JPS5957495A JP16933182A JP16933182A JPS5957495A JP S5957495 A JPS5957495 A JP S5957495A JP 16933182 A JP16933182 A JP 16933182A JP 16933182 A JP16933182 A JP 16933182A JP S5957495 A JPS5957495 A JP S5957495A
Authority
JP
Japan
Prior art keywords
wiring pattern
board
electronic components
substrate
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16933182A
Other languages
Japanese (ja)
Inventor
中尾 和弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP16933182A priority Critical patent/JPS5957495A/en
Publication of JPS5957495A publication Critical patent/JPS5957495A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 く技術分野〉 本発明は配線パターンの形成と同時に該パターンと実装
部品との接続を行える印刷配線基板に関するものである
DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a printed wiring board that can form a wiring pattern and simultaneously connect the pattern to a mounted component.

〈従来技術〉 一般に電子機器に設けられる印刷配線基板は、絶縁材料
からなる基板上に導電材料からなる配線パターンをフォ
トエツチングにより形成し、さらこの基板上に電子部品
を設け、その端子を半田付等により配線パターに接続固
定する方法が採用されている。
<Prior art> Generally, printed wiring boards installed in electronic devices are made by forming a wiring pattern made of a conductive material on a board made of an insulating material by photo-etching, then placing electronic components on this board, and soldering the terminals. A method of connecting and fixing the wire to the wiring pattern is adopted.

しかしながら、とのような従来の方法はいずれも基板上
に配線パターンを形成した後に、さらに電子部品の端子
を配線パターンに接続するだめに特別な工程を必要とし
ておシ、工程数が多く且つ煩雑であるという欠点があっ
た。
However, all of the conventional methods require a special process to connect the terminals of electronic components to the wiring pattern after forming the wiring pattern on the board, resulting in a large number of processes and are complicated. It had the disadvantage of being.

〈目自勺〉 それゆえ、本発明の目的は配線パターンの形成と同時に
、該パターンと実装した電子部品との接続固定を行える
ようにした新規な配線基板の提供にある。
Therefore, an object of the present invention is to provide a novel wiring board in which a wiring pattern can be formed and, at the same time, the wiring pattern can be connected and fixed to a mounted electronic component.

〈実施例〉 以下図にもとづいて本発明の詳細な説明する。<Example> The present invention will be explained in detail below based on the drawings.

第1図乃至第3図は本発明基板の製造工程を示す図であ
る。
FIGS. 1 to 3 are diagrams showing the manufacturing process of the substrate of the present invention.

図において、まず絶縁基板1の表面に電子部品を挿入す
る凹部2.3等を形成する。凹部2は抵抗、コンデンサ
等のチップタイプの小型電子部8壺 でも本体から線状の端子を導出させたもを挿入するだめ
に適したもので、図示の如く端子が基板表面と路面−と
なるように二段に形成されている。
In the figure, first, recesses 2.3 and the like into which electronic components are inserted are formed on the surface of an insulating substrate 1. The recess 2 is suitable for inserting a small chip-type electronic part 8 such as a resistor or capacitor with a wire terminal led out from the main body, and the terminal is connected to the board surface and the road surface as shown in the figure. It is formed in two stages.

一方、四部3は本体表面に端子が形成されたチップ部品
を挿入するもので、単に凹状に形成され、該チップ部品
表面と基板表面とが路面−となるようにその深さが定め
られている。また、これら凹部2.3の開ロ形状d:挿
入する電子部品の形状に合わせて設けられており、この
開口形状により挿入すべき電子部品が判断できるように
考慮されている。
On the other hand, the fourth part 3 is for inserting a chip component having terminals formed on the surface of the main body, and is simply formed in a concave shape, and its depth is determined so that the surface of the chip component and the surface of the board become the road surface. . Further, the opening shape d of these recesses 2.3 is provided in accordance with the shape of the electronic component to be inserted, and it is considered that the electronic component to be inserted can be determined based on this opening shape.

このように絶縁基板1の表面に四部2.3を形成しての
ち、その凹部内に計量吐出器(ディスベンザ−)を用い
て接着剤4を注入し、電子部品5.6を挿入して固定す
る(第2図参照)。接着剤4にはエポギシ系あるいはウ
レタン系のものを使用する。
After forming the four parts 2.3 on the surface of the insulating substrate 1 in this way, adhesive 4 is injected into the recess using a dispenser (dispenser), and the electronic component 5.6 is inserted and fixed. (See Figure 2). As the adhesive 4, an epoxy or urethane adhesive is used.

その後、前記凹部形成側の基板表面にシルクスクリーン
等を用いて熱硬化性もしくは光硬化性の導電インクを塗
布し、第3図に示す通シ凹部2.3に挿入した電子部品
5.6の端子に適宜接続する配線パターン7を形成して
構成される。
Thereafter, a thermosetting or photocurable conductive ink is applied to the surface of the substrate on the side where the recess is formed using a silk screen or the like, and the electronic component 5.6 inserted into the through recess 2.3 shown in FIG. It is constructed by forming a wiring pattern 7 that is connected to the terminal as appropriate.

熱硬化性導電インクはカーボンを主原料としたペースト
状を呈し、塗布後80℃の低温下で10分程度で硬化す
るので、電子部品及び基板に悪い影響を及ぼさない。一
方、光硬化性導電インクは感光性物質を含む嫡出な粘度
を有する樹脂(インク)に銀などの金属粉体を混合した
もので、光線特に紫外線を照射することにより、樹脂中
の感光物質の作用で樹脂が硬化するものであり、加熱せ
ずに硬化する利点がある。
The thermosetting conductive ink is in the form of a paste made mainly of carbon, and hardens in about 10 minutes at a low temperature of 80° C. after being applied, so it does not have a negative effect on electronic components and substrates. On the other hand, photocurable conductive ink is a mixture of a viscous resin (ink) containing a photosensitive substance and metal powder such as silver. The resin is cured by the action, and has the advantage of curing without heating.

かかる構成によれば、従来は基板上に配線パターンを形
成l〜、電子部品を実装し、さらに電子部品の端子と配
線パターンを半田付等により接続固定して構成される。
According to such a structure, conventionally, a wiring pattern is formed on a board, electronic components are mounted, and the terminals of the electronic components and the wiring pattern are connected and fixed by soldering or the like.

これに対し、本発明によれば基板に電子部品を実装し配
線パターンを形成するだけで、部品端子と配線パターン
を接続することができるので、煩雑な工程を減少させる
ことができる。
In contrast, according to the present invention, component terminals and wiring patterns can be connected by simply mounting electronic components on a board and forming wiring patterns, thereby reducing the number of complicated steps.

尚上記実施例では、接着剤により凹部に電子部品を固着
しているが、電子部品を嵌着できるように凹部を形成す
るか、または配線パターンの強度を充分大きくすれば接
着剤を省略することができる0 第4図は本発明基板の使用例を示すもので、図示の如く
基板1を電卓の裏パネルに兼用したものである。この構
成によれば基板をパネルに接続する作業が省略でき、か
つ部品点数の大幅な削減とともにパネル構造の簡略化と
相俟ってきわめて薄く且つ安価外電卓を提供することが
できる。なお、8は接点付キーゴム、9は表示パネルで
ある。
In the above embodiment, the electronic components are fixed in the recesses with adhesive, but the adhesive can be omitted if the recesses are formed so that the electronic components can be fitted or the strength of the wiring pattern is sufficiently increased. Figure 4 shows an example of the use of the substrate of the present invention, and as shown in the figure, the substrate 1 is also used as the back panel of a calculator. According to this configuration, the work of connecting the board to the panel can be omitted, the number of parts can be significantly reduced, and the panel structure can be simplified, making it possible to provide an extremely thin and inexpensive calculator. Note that 8 is a key rubber with contacts, and 9 is a display panel.

く効果〉 以上の様に本発明の印刷配線基板は、絶縁基板表面に電
子部品実装用の凹部を形成するとともに、との凹部に挿
入した電子部品端子に接続するように前記基板表面に熱
硬化性もしくけ光硬化性等の導電インクによる配線パタ
ーンを形成して成るから、配線パターンの形成と同時に
該パターンと実装部品との接続を行える。したがって、
本発明に第1図乃至第3図は本発明基板の製造工程を示
す図、第4図は同基板の使用例を示す図である。
Effects> As described above, the printed wiring board of the present invention has a recess for mounting electronic components on the surface of the insulating substrate, and a heat-hardening layer on the surface of the board so as to connect to the electronic component terminal inserted into the recess. Since the wiring pattern is formed using a conductive ink such as a photocurable ink, the wiring pattern can be connected to the mounted component at the same time as the wiring pattern is formed. therefore,
In accordance with the present invention, FIGS. 1 to 3 are diagrams showing the manufacturing process of the substrate of the present invention, and FIG. 4 is a diagram showing an example of use of the same substrate.

1は基板、2,3は凹部、4は接着剤、5.6は電子部
品、7は配線パターン
1 is the board, 2 and 3 are the recesses, 4 is the adhesive, 5.6 is the electronic component, and 7 is the wiring pattern

Claims (1)

【特許請求の範囲】[Claims] 1 絶縁基板表面に電子部品実装用の凹部を形成すると
ともに、この四部に挿入した電子部品端子に接続するよ
うに前記基板表面に熱硬化性もしくは光硬化性等の導電
インクによる配線パターンを形成して成ることを特徴と
する印刷配線基板。
1 Form recesses for mounting electronic components on the surface of an insulating substrate, and form wiring patterns using conductive ink such as thermosetting or photocurable ink on the surface of the substrate so as to connect to the electronic component terminals inserted in these four areas. A printed wiring board characterized by comprising:
JP16933182A 1982-09-27 1982-09-27 Printed circuit board Pending JPS5957495A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16933182A JPS5957495A (en) 1982-09-27 1982-09-27 Printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16933182A JPS5957495A (en) 1982-09-27 1982-09-27 Printed circuit board

Publications (1)

Publication Number Publication Date
JPS5957495A true JPS5957495A (en) 1984-04-03

Family

ID=15884564

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16933182A Pending JPS5957495A (en) 1982-09-27 1982-09-27 Printed circuit board

Country Status (1)

Country Link
JP (1) JPS5957495A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH029475U (en) * 1988-07-04 1990-01-22
JPH06350233A (en) * 1993-06-10 1994-12-22 Sankyo Seiki Mfg Co Ltd Circuit board

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5674986A (en) * 1979-11-22 1981-06-20 Matsushita Electric Works Ltd Device for mounting electric part
JPS5867099A (en) * 1981-10-19 1983-04-21 松下電器産業株式会社 Electronic equipment

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5674986A (en) * 1979-11-22 1981-06-20 Matsushita Electric Works Ltd Device for mounting electric part
JPS5867099A (en) * 1981-10-19 1983-04-21 松下電器産業株式会社 Electronic equipment

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH029475U (en) * 1988-07-04 1990-01-22
JPH06350233A (en) * 1993-06-10 1994-12-22 Sankyo Seiki Mfg Co Ltd Circuit board

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