JPS61287197A - Manufacture of electronic component - Google Patents

Manufacture of electronic component

Info

Publication number
JPS61287197A
JPS61287197A JP12889985A JP12889985A JPS61287197A JP S61287197 A JPS61287197 A JP S61287197A JP 12889985 A JP12889985 A JP 12889985A JP 12889985 A JP12889985 A JP 12889985A JP S61287197 A JPS61287197 A JP S61287197A
Authority
JP
Japan
Prior art keywords
component
chip component
solder paste
wiring board
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12889985A
Other languages
Japanese (ja)
Inventor
義孝 福岡
恵美子 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP12889985A priority Critical patent/JPS61287197A/en
Publication of JPS61287197A publication Critical patent/JPS61287197A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 [発明の技術分野] 本発明は配線基板の両面にチップ部品がマウントされて
いる電子部品の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method of manufacturing an electronic component in which chip components are mounted on both sides of a wiring board.

[発明の技術的背景とその問題点] 一般にセラミック多層配線基板等においては、集積密度
を高めるため基板の裏面をも利用することが多い。基板
の両面にICのようなチップ部品をマウントする方法と
して、従来は第2図に示すように、まず第2図(a )
のように配線基板4の主面イの導体パターン上に半田ペ
ースト3を印刷・乾燥して半田プリントしたパッド2を
形成し、そこに1C等の部品1をマウントした後、ベル
1〜リフローによって部品を接着・固定さゼ、次に配線
基板4を裏返して裏面口の導体パターン上に半田ペース
ト3を印刷・乾燥して、半田プリントしたバット2を形
成し、そこにIC等の部品11をマウントし、ベルトリ
フローにより部品を接着・固定させるという方法がとら
れていた。
[Technical Background of the Invention and Problems Therewith] Generally, in ceramic multilayer wiring boards and the like, the back side of the board is often used to increase the integration density. Conventionally, as a method for mounting chip components such as ICs on both sides of a board, as shown in Fig. 2(a),
As shown in the figure, the solder paste 3 is printed and dried on the conductor pattern on the main surface A of the wiring board 4 to form the solder-printed pad 2, and after mounting the component 1 such as 1C thereon, the solder paste 3 is printed and dried on the conductor pattern on the main surface A of the wiring board 4, and after mounting the component 1 such as 1C thereon, After gluing and fixing the components, the wiring board 4 is then turned over and solder paste 3 is printed and dried on the conductor pattern at the back opening to form a solder-printed batt 2, on which components 11 such as ICs are attached. The method used was to mount the parts and use belt reflow to adhere and fix the parts.

しかしながらこのような従来の方法においては、第2図
(b )で示すように裏面口をベルトリフローする際に
、その熱が主面イに伝わり、これによっで基板4の主面
イに部品1を接着している半田が溶融して部品1が落ち
たり、落ちないまでもずれてしまうという問題が生じて
いた。この場合、主面イ上の欠落した部品1を再度ベル
トリフローにより接着しようとしても、今度は逆に下向
きになる裏面口上の半田が溶融するので部品11につい
て同様の問題が生じる。
However, in this conventional method, as shown in FIG. 2(b), when belt reflow is performed on the back side opening, the heat is transferred to the main surface A, and as a result, parts are attached to the main surface A of the board 4. There has been a problem in that the solder that adheres parts 1 to each other melts, causing parts 1 to fall off or even shift. In this case, even if an attempt is made to bond the missing component 1 on the main surface A again by belt reflow, the solder on the back opening facing downward will melt, and a similar problem will occur for the component 11.

このように従来の方法では、部品搭載中にすでに修正が
困難な部品欠落等の不都合が生じることとなる。この結
果、部品が欠落にまで及ばす、ずれにとどまったとして
も部品がとれやすく、製品の信頼性に欠けると共に外観
上も良好なものではなかった。
As described above, in the conventional method, inconveniences such as missing parts that are difficult to correct already occur during component mounting. As a result, parts may be missing, or even if they are only misaligned, they are easy to come off, resulting in a product that lacks reliability and does not have a good appearance.

そこで第3図に示すように、裏面口には半田ペーストと
して一般的な融点183℃のSn /Pb−63/37
等の低融点半田ペースト3′を使用し、主面イには裏面
口のベルトリフローの際の半田溶融温度(一般に220
℃)より融点の高い、例えば融点280℃のSn /P
b =10/90等の高融点半田ペースト3″を使用す
れば裏面口のベルトリフローによって先に固められた主
面イの半田が溶融することはな(部品の欠落等を防ぐこ
とができる。
Therefore, as shown in Figure 3, Sn/Pb-63/37, which has a melting point of 183°C and is a common solder paste, is used for the back opening.
Use a low melting point solder paste 3' such as
), e.g. Sn/P with a melting point of 280°C.
If a high melting point solder paste 3'' such as b = 10/90 is used, the solder on the main surface A that has been hardened earlier by the belt reflow at the back opening will not melt (this can prevent parts from falling off, etc.).

しかしこの方法では主面イで使用する高融点半田ペース
ト3″のぬれ性が悪いためきれいにパッド上にぬれず、
主面イの表面が第4図に示すようになって外観上極めて
粗悪であり製品にはならない。
However, with this method, the high melting point solder paste 3'' used on the main surface A has poor wettability and cannot be wetted neatly onto the pad.
The surface of the main surface A is as shown in FIG. 4, and the appearance is extremely poor and cannot be used as a product.

また第5図に示すように基板24の主面イ上に部品1を
マウントする際に部品1をパッド外の部分で非導電性エ
ポキシ樹脂8等で接着させれば裏面口上に部品11をベ
ルトリフローで接着する際に主面イの半田が溶融しても
部品1がずれたりすることがない。
Furthermore, as shown in FIG. 5, when mounting the component 1 on the main surface A of the board 24, if the component 1 is bonded with non-conductive epoxy resin 8 or the like on the outside of the pad, the component 11 can be mounted on the back opening. Even if the solder on the main surface A melts during reflow bonding, the component 1 will not shift.

しかしこの方法は限られた細かい部分に非導電性エポキ
シ樹脂を塗布するという工程が必要なので製品のコスト
アップにつながる。また、第5図の部品1のように非導
電性エポキシ樹脂をっけすぎて部品がパッドから浮いて
しまったり、あるいは非導電性エポキシ樹脂が導体パッ
ド上に流れ込んで部品と導体パターンの電気的接続を妨
げる等の問題がある。
However, this method requires a step of applying non-conductive epoxy resin to a limited number of small areas, which increases the cost of the product. In addition, as shown in Part 1 in Figure 5, too much non-conductive epoxy resin may be applied, causing the part to float off the pad, or non-conductive epoxy resin may flow onto the conductor pad, causing electrical problems between the component and the conductor pattern. There are problems such as interfering with the connection.

[発明の目的] 本発明はこれらの問題を解決するためになされたもので
、配線基板の両面にIC等のチップ部品を搭載するに際
し、外観上の損傷がなく、かつ部品と導体パターンとの
電気的接続が良好で搭載工程にも不都合のない電子部品
の製造方法を提供することを目的とする。
[Purpose of the Invention] The present invention has been made to solve these problems, and when mounting chip components such as ICs on both sides of a wiring board, there is no damage to the appearance and there is no contact between the components and the conductor pattern. It is an object of the present invention to provide a method for manufacturing electronic components that has good electrical connection and is free from inconvenience in the mounting process.

[発明の概要] すなわち本発明の電子部品の製造方法は、配線基板上に
配置された導体パターン上の所定位置に半田ペーストを
印刷・乾燥する第1の工程と、この半田ペーストを印刷
したパッド上にチップ部品をマウントする第2の工程と
、ベルトリフローすることによりチップ部品を配線基板
上に接着・固定させる第3の工程と、この固定されたチ
ップ部品の周辺領域に封止用樹脂を注入、硬化させて前
記チップ部品を保護封止する第4の工程と、前記チップ
部品の裏面上に配置された導体パターン上の所定位置に
半田ペーストを印刷・乾燥する第5の工程と、この半田
ペーストを印刷したパッド上にチップ部品をマウントす
る第6の工程と、ベルトリフローすることによりチップ
部品を配線基板上に接着・固定する第7の工程とを備え
たことを特徴とする。
[Summary of the Invention] That is, the method for manufacturing an electronic component of the present invention includes a first step of printing and drying a solder paste at a predetermined position on a conductor pattern arranged on a wiring board, and a pad on which this solder paste is printed. The second step is to mount the chip components on the wiring board, the third step is to bond and fix the chip components onto the wiring board by belt reflow, and to apply sealing resin to the peripheral area of the fixed chip components. a fourth step of injecting and curing to protect and seal the chip component; a fifth step of printing and drying a solder paste at a predetermined position on a conductive pattern placed on the back surface of the chip component; The present invention is characterized by comprising a sixth step of mounting the chip component on a pad printed with solder paste, and a seventh step of adhering and fixing the chip component onto the wiring board by belt reflow.

[発明の実施例] 以下本発明の実施例を図面に基づいて説明する。[Embodiments of the invention] Embodiments of the present invention will be described below based on the drawings.

第1図(a )に示すように配線基板34の主面イ上の
所定位置に配置され、半田プリントされたパッド2上に
部品1をマウントし、ベルトリフローによってパッド2
に部品1を接着・固定した。
As shown in FIG. 1(a), the component 1 is mounted on the solder-printed pad 2 placed at a predetermined position on the main surface A of the wiring board 34, and the pad 2 is placed on the solder-printed pad 2 by belt reflow.
Part 1 was glued and fixed to.

次に第1図(b)に示すように部品1の接合部を含む周
辺部に、溶融させた封止用樹脂9を注入した後、硬化さ
せて部品1を保護封止した。この封止用樹脂としては例
えばシリコーン樹脂又はエポキシ樹脂等を用いることが
できる。次いで基板34を裏返し、第1図<O)に示す
ように裏面口の導体パターン上に半田ペースト3を印刷
・乾燥して半田プリントされたパッド2を形成し、部品
11をマウントした後ベルトリフローすることにより部
品11を接着・固定させた。この部品11のベルトリフ
ロ一時には主面イ上の部品1は封止用樹脂によって保護
封止されているので欠落したりずれたりすることがなく
、得られる製品は信頼性の高いものであった。
Next, as shown in FIG. 1(b), a molten sealing resin 9 was injected into the periphery of the component 1 including the joint, and then hardened to protect and seal the component 1. As this sealing resin, for example, silicone resin or epoxy resin can be used. Next, the board 34 is turned over, and the solder paste 3 is printed and dried on the conductor pattern of the back opening as shown in FIG. By doing so, the component 11 was bonded and fixed. During the belt reflow of the component 11, the component 1 on the main surface A was protected and sealed with the sealing resin, so it did not come off or shift, and the resulting product was highly reliable.

[発明の効果] 以上説明したように、本発明によれば、配線基板の両面
にチップ部品を搭載するに際し、部品が欠落したりずれ
たりすることがないのでマウント、ベルトリフロー等の
部品搭載工程における歩留りが向上し、製品に対する信
頼性も高まる。また、エポキン樹脂等の樹脂で部品を封
止した面は、部品をキズや汚れから保護でき、耐久性に
も優れている等の利点がある。
[Effects of the Invention] As explained above, according to the present invention, when chip components are mounted on both sides of a wiring board, the components do not come off or shift, so component mounting processes such as mounting and belt reflow can be easily performed. This improves the yield and reliability of the product. Furthermore, the surface of the component sealed with a resin such as Epoquin resin has the advantage that the component can be protected from scratches and dirt, and is also excellent in durability.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の工程を概略的に説明する図
、第2図は従来の電子部品の製造方法の工程を概略的に
説明する図、第3図は他の従来例を概略的に説明する図
、第4図はその平面図、第5図はさらに別の従来例を概
略的に説明する図を示す。 1.11・・・部 品
FIG. 1 is a diagram schematically explaining the steps of an embodiment of the present invention, FIG. 2 is a diagram schematically explaining the steps of a conventional electronic component manufacturing method, and FIG. 3 is a diagram schematically explaining the steps of a conventional electronic component manufacturing method. 4 is a plan view thereof, and FIG. 5 is a diagram schematically illustrating another conventional example. 1.11...Parts

Claims (1)

【特許請求の範囲】[Claims] (1)配線基板上に配置された導体パターン上の所定位
置に半田ペーストを印刷・乾燥する第1の工程と、この
半田ペーストを印刷したパッド上にチップ部品をマウン
トする第2の工程と、ベルトリフローすることによりチ
ップ部品を配線基板上に接着・固定させる第3の工程と
、この固定されたチップ部品の周辺領域に封止用樹脂を
注入、硬化させて前記チップ部品を保護封止する第4の
工程と、前記チップ部品の裏面上に配置された導体パタ
ーン上の所定位置に半田ペーストを印刷・乾燥する第5
の工程と、この半田ペーストを印刷したパッド上にチッ
プ部品をマウントする第6の工程と、ベルトリフローす
ることによりチップ部品を配線基板上に接着・固定する
第7の工程とを備えたことを特徴とする電子部品の製造
方法。
(1) A first step of printing and drying a solder paste at a predetermined position on a conductor pattern placed on a wiring board, and a second step of mounting a chip component on the pad printed with this solder paste, A third step is to adhere and fix the chip component onto the wiring board by belt reflow, and to protect and seal the chip component by injecting a sealing resin into the peripheral area of the fixed chip component and curing it. a fourth step, and a fifth step of printing and drying the solder paste at a predetermined position on the conductor pattern placed on the back surface of the chip component.
, a sixth step of mounting the chip component on the pad printed with this solder paste, and a seventh step of bonding and fixing the chip component onto the wiring board by belt reflow. Characteristic manufacturing method for electronic components.
JP12889985A 1985-06-13 1985-06-13 Manufacture of electronic component Pending JPS61287197A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12889985A JPS61287197A (en) 1985-06-13 1985-06-13 Manufacture of electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12889985A JPS61287197A (en) 1985-06-13 1985-06-13 Manufacture of electronic component

Publications (1)

Publication Number Publication Date
JPS61287197A true JPS61287197A (en) 1986-12-17

Family

ID=14996105

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12889985A Pending JPS61287197A (en) 1985-06-13 1985-06-13 Manufacture of electronic component

Country Status (1)

Country Link
JP (1) JPS61287197A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03200393A (en) * 1989-12-27 1991-09-02 Fujitsu Ltd Printed wiring board and manufacture thereof
JP2009290286A (en) * 2008-05-27 2009-12-10 Murata Mfg Co Ltd Non-reciprocal circuit element and composite electronic component

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03200393A (en) * 1989-12-27 1991-09-02 Fujitsu Ltd Printed wiring board and manufacture thereof
JP2009290286A (en) * 2008-05-27 2009-12-10 Murata Mfg Co Ltd Non-reciprocal circuit element and composite electronic component

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