JPS58103198A - Method of mounting electronic part - Google Patents
Method of mounting electronic partInfo
- Publication number
- JPS58103198A JPS58103198A JP20289781A JP20289781A JPS58103198A JP S58103198 A JPS58103198 A JP S58103198A JP 20289781 A JP20289781 A JP 20289781A JP 20289781 A JP20289781 A JP 20289781A JP S58103198 A JPS58103198 A JP S58103198A
- Authority
- JP
- Japan
- Prior art keywords
- board
- electronic components
- bumps
- electronic component
- paste
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明梃半導体チップ等の電子部品を基板に取付ける方
法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for attaching electronic components such as semiconductor chips to a substrate.
従来、電子部品を基板にポンディングする方法として次
の如き方法がある。即ち、第１図に示す如く半導体ＬＳ
ｉチップ等の電子部品１上に突出したバンプｌａ＋１ａ
’に鉛−錫系のはんだバンプ２゜２／を形成し、一方第
２図の如く、ガラス基板として例えばガラス繊維をエポ
キシ系樹脂で硬化させたガラスエポキシ材３上に銅（Ｃ
ｕ）第１導体配線を施し、さらにこの上に銅の腐蝕等を
防止するためにニッケル（Ｎｉ ）メッキ５及び金（Ａ
ｕ）メツキロを施し、Ａｕメッキの露出を防ぎ、ポンデ
ィングしない基板面の保護及び絶縁を施すためにレジス
＾形成し、しかる後、第３図に示すようにポンディング
装置を用いて電子部品上のバンプと基板とをボンディン
グ結合し、ポツティング樹脂８により封止し、樹脂ディ
スク９を施すものであった０
しかしながら、この従来方法°、は、チップ上に突出し
たバンプ２，２′に鉛−錫等のはんだバンプ２゜２′を
形成する工程、チップの搭載機、はんだを溶融接着させ
るための加熱リフロー炉を必要とし、さらに電子部品チ
ップを基板に取り付けるための工程数の多い、大掛りな
ポンディング装置を必要とするなどの問題があった。Conventionally, there are the following methods for bonding electronic components to a board. That is, as shown in FIG.
Bump la+1a protruding on electronic component 1 such as i-chip
Lead-tin solder bumps 2゜2/ are formed on the substrate, and as shown in Fig. 2, a copper (C
u) First conductor wiring is applied, and nickel (Ni) plating 5 and gold (A
u) A resist layer is applied to prevent the exposure of the Au plating, and a resist is formed to protect and insulate the board surface that will not be bonded.After that, as shown in Figure 3, a bonding device is used to bond the electronic components. However, in this conventional method, the bumps 2 and 2' protruding on the chip are bonded with a substrate, sealed with potting resin 8, and a resin disk 9 is applied. It is a large-scale process that requires a process to form solder bumps 2゜2' of tin, etc., a chip mounting machine, a heating reflow oven to melt and bond the solder, and a large number of processes to attach electronic component chips to the board. There were problems such as the need for a large ponding device.
本発明は上記従来の諸点に鑑みてなされたもので、はん
だバンプの形成、大損りなボンディング装置を必要とせ
ず、電子部品の位置合せが極めて簡単で確実な電子部品
の取付は方法を提供せんとするものである。The present invention has been made in view of the above-mentioned conventional points, and it is an object of the present invention to provide a method for mounting electronic components that is extremely easy to align and that does not require the formation of solder bumps or a costly bonding device. It is something to do.
すなわち、基板上の電子部品のバンプ部分に対応する領
域以外にレジストを被覆し、バンプ部分に対応する基板
上にペースト状はんだ材料を印刷又は塗布することによ
って、電子部品を仮り止め（固定）した後、ペースト状
はんだ材料を加熱リフロー炉等を用いて溶融し、電子部
品を基板に取り付けるようにしたものである。In other words, the electronic component is temporarily fixed (fixed) by coating the resist on the area other than the area corresponding to the bump part of the electronic component on the board, and printing or applying a paste solder material on the board corresponding to the bump part. Thereafter, the paste solder material is melted using a heated reflow oven or the like, and the electronic component is attached to the board.
以下本発明の一実施例を図面を参照して説明する。第４
〜６図は本発明の一方法を示し、図において第１〜３図
と同一部分には同一符号を以って示す。本発明によれば
、とくに基板３、例えばガラスエポキシ材上に銅配線４
、Ｎ ｉｓ Ａｕメッキ（５゜６）を形成した後、バ
ンプ１ａ＋１ａ’に対応する領域以外にレジスト１０を
コートし、一方パンプｌａ。An embodiment of the present invention will be described below with reference to the drawings. Fourth
6 to 6 show one method of the present invention, in which the same parts as in FIGS. 1 to 3 are designated by the same reference numerals. According to the invention, in particular a copper wiring 4 is provided on a substrate 3, for example a glass epoxy material.
, Ni is Au plating (5°6), a resist 10 is coated on areas other than the areas corresponding to the bumps 1a+1a', while the bumps 1a.
１ ａ’部分に対応する領域にはペースト状はんだ材料
（例えば、鉛、錫、鉛−錫系合金）１］ａ、Ｉｌａ’を
印刷あるいは塗布により形成する。しかる後、電子部品
１上に突出したバンプｌａ、ｌａ’をペースト状はんだ
材料１１ａｅｌｌａ’に仮り接着させ、それを加熱炉へ
入れてはんだ材料をリフローさせ、洗浄し、ポツティン
グ樹脂８で封止し、硬化させるものである。このように
、電子部品ｌのバンプｌａ。1 A paste-like solder material (for example, lead, tin, lead-tin alloy) 1]a, Ila' is formed by printing or coating in a region corresponding to the a' portion. Thereafter, the bumps la and la' protruding on the electronic component 1 are temporarily bonded to a paste-like solder material 11aella', placed in a heating furnace to reflow the solder material, cleaned, and sealed with a potting resin 8. , hardening. In this way, the bump la of the electronic component l.
１ ａ’にはんだバンプ２．２′をメッキ等により形成
する代わりに基板側にチップバンプに対応する基ん
板上の領域にペースト状はすだ材料を印刷等により形成
しておけば、半導体ＬＳｉチップ等の電子部品の製造及
び取付は工程が簡略化される。またレジスト材１０に対
してペースト状はんだ材料１１ａ、１１ａ’の面位置を
少し低くすれば、チップバンプ、引いては電子部品と基
板との位置合せが極めて容易で確実となり、自動機械装
置によってＬＳｉチップを基板に容易に搭載することが
可能となる。Instead of forming the solder bumps 2.2' on 1a' by plating, etc., if a paste-like solder material is formed by printing, etc. on the area of the board corresponding to the chip bumps on the board side, the semiconductor The manufacturing and mounting process of electronic components such as LSi chips is simplified. Furthermore, if the surface position of the paste solder materials 11a and 11a' is made a little lower than the resist material 10, alignment of the chip bumps, and by extension the electronic components and the board, will be extremely easy and reliable, and automatic machinery will be able to It becomes possible to easily mount the chip on the board.
以上説明したように本発明の方法によれば、電子部品上
に突出した接続端子（バンプ）にはんだバンプを形成す
る工程が不要となり、部品の製造が簡略化され、ボンデ
ィング工程に代えて単に部品搭載工程で行えるためのボ
ンディング装置が不要となり、さらに部品と基板との位
置合せが極めて確実で容易となるなどの利点がある。As explained above, according to the method of the present invention, the process of forming solder bumps on the connection terminals (bumps) protruding on electronic components is no longer necessary, the manufacturing of components is simplified, and the bonding process is replaced by simply There are advantages such as no need for a bonding device during the mounting process, and furthermore, the alignment of the components and the board becomes extremely reliable and easy.
第１図ないし第３図は従来の電子部品のボンディング方
法による製作工程を説明するための要部構成断面図、第
４図ないし第６図は本発明による電子部品の取付は方法
の一実施例を示す製作工程を説明するための要部構成断
面図で声る。
図中、１：電子部品、ｌａ、ｌａ’：チップバンプ、８
：基板、１０ニレジスト材料、１１ａ、１１ａ’：ペー
スト状はんだ材料。
代理人 弁理士 福 士 愛 彦
第１図
第２図
第３図Figures 1 to 3 are cross-sectional views of main parts for explaining the manufacturing process using the conventional bonding method for electronic components, and Figures 4 to 6 are examples of the method for attaching electronic components according to the present invention. A cross-sectional view of the main parts to explain the manufacturing process. In the figure, 1: electronic component, la, la': chip bump, 8
: Substrate, 10 resist material, 11a, 11a': Paste solder material. Agent Patent Attorney Aihiko Fukushi Figure 1 Figure 2 Figure 3
Claims (1)
の接続端子とを結合するものにおいて、上記基板上の上
記７７１部分に対応する領域以外にレジストを被覆する
とともにバンプ部分に対応する領域にペースト状はんだ
材料を印刷又は塗布することによって、上記電子部品を
仮り止めした後、上記ペースト状半田材料を溶融して、
電子部品を基板に取り付けることを特徴とする電子部品
の取付は方法。1. In a device that connects a connecting terminal (bump) protruding on an electronic component and a connecting terminal on a board, an area other than the area corresponding to the 771 part on the board is coated with resist, and an area corresponding to the bump part After temporarily fixing the electronic component by printing or applying a paste-like solder material, melting the paste-like solder material,
A method for attaching electronic components, characterized by attaching electronic components to a board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20289781A JPS58103198A (en) | 1981-12-15 | 1981-12-15 | Method of mounting electronic part |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20289781A JPS58103198A (en) | 1981-12-15 | 1981-12-15 | Method of mounting electronic part |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58103198A true JPS58103198A (en) | 1983-06-20 |
Family
ID=16465005
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20289781A Pending JPS58103198A (en) | 1981-12-15 | 1981-12-15 | Method of mounting electronic part |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58103198A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03504064A (en) * | 1989-01-03 | 1991-09-05 | モトローラ・インコーポレーテッド | Manufacturing method for high-density solder bumps and substrate sockets for high-density solder bumps |
| JPH05508736A (en) * | 1990-07-18 | 1993-12-02 | インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン | Metal connector structures, methods of forming them and methods of forming interconnect assemblies |
| US6461953B1 (en) | 1998-08-10 | 2002-10-08 | Fujitsu Limited | Solder bump forming method, electronic component mounting method, and electronic component mounting structure |
-
1981
- 1981-12-15 JP JP20289781A patent/JPS58103198A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03504064A (en) * | 1989-01-03 | 1991-09-05 | モトローラ・インコーポレーテッド | Manufacturing method for high-density solder bumps and substrate sockets for high-density solder bumps |
| JPH05508736A (en) * | 1990-07-18 | 1993-12-02 | インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン | Metal connector structures, methods of forming them and methods of forming interconnect assemblies |
| US6461953B1 (en) | 1998-08-10 | 2002-10-08 | Fujitsu Limited | Solder bump forming method, electronic component mounting method, and electronic component mounting structure |
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