JPS595354A - デ−タ処理装置 - Google Patents

デ−タ処理装置

Info

Publication number
JPS595354A
JPS595354A JP57114423A JP11442382A JPS595354A JP S595354 A JPS595354 A JP S595354A JP 57114423 A JP57114423 A JP 57114423A JP 11442382 A JP11442382 A JP 11442382A JP S595354 A JPS595354 A JP S595354A
Authority
JP
Japan
Prior art keywords
instruction
dummy
register
machine language
dummy time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57114423A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6232502B2 (enExample
Inventor
Hideyuki Saso
秀幸 佐相
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57114423A priority Critical patent/JPS595354A/ja
Publication of JPS595354A publication Critical patent/JPS595354A/ja
Publication of JPS6232502B2 publication Critical patent/JPS6232502B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22Microcontrol or microprogram arrangements
    • G06F9/223Execution means for microinstructions irrespective of the microinstruction function, e.g. decoding of microinstructions and nanoinstructions; timing of microinstructions; programmable logic arrays; delays and fan-out problems

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)
JP57114423A 1982-06-30 1982-06-30 デ−タ処理装置 Granted JPS595354A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57114423A JPS595354A (ja) 1982-06-30 1982-06-30 デ−タ処理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57114423A JPS595354A (ja) 1982-06-30 1982-06-30 デ−タ処理装置

Publications (2)

Publication Number Publication Date
JPS595354A true JPS595354A (ja) 1984-01-12
JPS6232502B2 JPS6232502B2 (enExample) 1987-07-15

Family

ID=14637338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57114423A Granted JPS595354A (ja) 1982-06-30 1982-06-30 デ−タ処理装置

Country Status (1)

Country Link
JP (1) JPS595354A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11207034A (ja) * 1997-11-20 1999-08-03 Nintendo Co Ltd 異なる種類のゲーム機間でバックアップデータを利用して プレイ可能なゲームシステム
US7134003B2 (en) 2002-12-12 2006-11-07 Arm Limited Variable cycle instruction execution in variable or maximum fixed cycle mode to disguise execution path
JP2015135538A (ja) * 2014-01-16 2015-07-27 三菱電機株式会社 プロセッサ

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5631141A (en) * 1979-08-22 1981-03-28 Nec Corp Information processor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5631141A (en) * 1979-08-22 1981-03-28 Nec Corp Information processor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11207034A (ja) * 1997-11-20 1999-08-03 Nintendo Co Ltd 異なる種類のゲーム機間でバックアップデータを利用して プレイ可能なゲームシステム
US7134003B2 (en) 2002-12-12 2006-11-07 Arm Limited Variable cycle instruction execution in variable or maximum fixed cycle mode to disguise execution path
JP2015135538A (ja) * 2014-01-16 2015-07-27 三菱電機株式会社 プロセッサ

Also Published As

Publication number Publication date
JPS6232502B2 (enExample) 1987-07-15

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