JPS5631141A - Information processor - Google Patents

Information processor

Info

Publication number
JPS5631141A
JPS5631141A JP10701479A JP10701479A JPS5631141A JP S5631141 A JPS5631141 A JP S5631141A JP 10701479 A JP10701479 A JP 10701479A JP 10701479 A JP10701479 A JP 10701479A JP S5631141 A JPS5631141 A JP S5631141A
Authority
JP
Japan
Prior art keywords
instruction
address
output
rom30
addresses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10701479A
Other languages
Japanese (ja)
Other versions
JPS6230452B2 (en
Inventor
Hideyo Kanayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10701479A priority Critical patent/JPS5631141A/en
Publication of JPS5631141A publication Critical patent/JPS5631141A/en
Publication of JPS6230452B2 publication Critical patent/JPS6230452B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Executing Machine-Instructions (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE: To ensure a low-cost time control by setting the address which does not exist in the memory device to the program counter PC and then securing a coincidence between the output of the memory device and the specified instruction code when the designation is given by the address mentioned above.
CONSTITUTION: Having the output information of n bits each, both the PC31 and the stack register 32 can designate the 2n units of addresses. And these addresses are larger than the address N the ROM30 possesses. Now in case a device having a low working speed is driven, the PC31 is defined as the address in which no program memory exists by the subroutine call instruction and after execution of the output ON instruction. Thus the no-operation NOP instruction is delivered from the ROM30. The PC31 is counted successively to execute the NOP instruction. And when the counting of the PC31 reaches the maximum address, the instruction 37 is delivered to carry out a similar working to the subroutine return instruction 36. Thus the PC31 is restored to the address next to the address of the instruction 35 to execute the output OFF instruction. In such way, the time control is possible with no increment of the program memory nor application of the timer counter.
COPYRIGHT: (C)1981,JPO&Japio
JP10701479A 1979-08-22 1979-08-22 Information processor Granted JPS5631141A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10701479A JPS5631141A (en) 1979-08-22 1979-08-22 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10701479A JPS5631141A (en) 1979-08-22 1979-08-22 Information processor

Publications (2)

Publication Number Publication Date
JPS5631141A true JPS5631141A (en) 1981-03-28
JPS6230452B2 JPS6230452B2 (en) 1987-07-02

Family

ID=14448309

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10701479A Granted JPS5631141A (en) 1979-08-22 1979-08-22 Information processor

Country Status (1)

Country Link
JP (1) JPS5631141A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS595354A (en) * 1982-06-30 1984-01-12 Fujitsu Ltd Data processing device
JPH01261727A (en) * 1988-04-12 1989-10-18 Rohm Co Ltd Microcomputer

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50114945A (en) * 1974-02-18 1975-09-09

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50114945A (en) * 1974-02-18 1975-09-09

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS595354A (en) * 1982-06-30 1984-01-12 Fujitsu Ltd Data processing device
JPS6232502B2 (en) * 1982-06-30 1987-07-15 Fujitsu Ltd
JPH01261727A (en) * 1988-04-12 1989-10-18 Rohm Co Ltd Microcomputer

Also Published As

Publication number Publication date
JPS6230452B2 (en) 1987-07-02

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