JPS55162153A - Information processor - Google Patents

Abstract

PURPOSE: To reduce the capacity of a control memory unit by providing the control memory unit with a memory unit which stores microinstructions common among respective micro conditional branch instructions and is accessed corresponding every instruction code.

CONSTITUTION: The instruction code of a micro conditional branch instruction set in microinstruction register 10 is used to read a work, corresponding to the instruction code, from memory unit 11 and the work is set in work register 12. On the basis of address MA of register 12 selected by selecting method 13 from instruction execution start signal ST, access to control memory unit 14 is attained. For a micro branch from unit 14, a common micro branch instruction is read out and at the same time, comparing method 16 checks whether the branch condition assignment part of register 12 agrees with the leading arithmetic result of conditional code register 15. Its coincidence signal is selected by branch selecting method 18 and the address part of the read micro branch instruction is further selected to attain access to unit 14; and the accessed microinstruction is decoded at 22 to execute the micro conditional branch instruction.

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