JPS5948923A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To flatten an electrode wiring surface while obtaining an electrode wiring, which is not disconnected, by attaching silicon nitride and titanium on a semiconductor substrate and reacting both substances through heating when a wiring or an electrode is formed by using a titanium nitride material. CONSTITUTION:The semiconductor substrate 1 is coated with a SiO2 film 2, an opening section 3 for forming the electrode is bored to a predetermined section, and a Si3N4 film 41 in approximately 2,000Angstrom thickness is formed on the whole surface containing a diffusion region exposed through a decompression plasma method. The film 41 is coated with a Ti film of the same thickness through an evaporation method, and a desired Ti pattern 42 is obtained through plasma etching. Consequently, the Si3N4 film of an excellent step coverage is obtained even when there is a stepped difference in the opening section for forming the electrode wiring. Accordingly, a thin electrode wiring layer of a flat surface can be formed, and the method contributes largely to the microminiaturizing of the element.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device using titanium nitride, which is suitable for forming flat and fine electrode wiring. This invention relates to a novel method for forming .

[Technical background of the invention]

In the manufacture of semiconductor devices, HHlAl, Au, etc. are used to form shelf wiring on the insulating film of the semiconductor substrate, but as the degree of integration increases, these electrode wiring patterns are becoming increasingly finer and On the wiring pattern [
In order to cover the surface with a passivation film or to perform multilayer wiring through an intermediate insulator, flattening is often required. , the passivation IE2 may break or crack, the passivation film may have poor coverage, or the upper multi-layer wiring may break due to disconnection. Therefore, the electrode wiring pattern must be formed as a flat pattern without any unevenness caused by the miniaturization dimension Z).

Conventionally, ′! 1 (The following two methods are generally adopted as methods for forming shelf wiring for conductor devices, but each method has the following problems as flat electrode wiring.

[Problems with background technology]

Fig. 1 shows an electrode wiring structure formed by a method called an etching method or a lift-off method as the first conventional method. After providing an opening 3f for forming an electrode in a predetermined portion of the insulating film 2 broken into particles, an electrode wiring material f such as A1 is formed on the entire surface of the substrate.
After that, unnecessary parts of the deposited film are etched or lifted off to selectively form the electrode wiring pattern 2.
It is formed by the method of leaving.

However, in this first conventional method, a vapor deposition film thickness of 1.5μ7718 degrees is required for the reason described later, and therefore the insulation layer 2 and the electrode wiring formed in a convex shape on the insulation layer 2 are Is the level difference between 4 and 4 1.5μ? It is about n, which is so large that it becomes an obstacle to the formation of a passivation film. The reason why the above-described thickness of the deposited film is required to be about 1.5 μm is that when the incident direction of the deposited particles is mainly in the direction of the arrow, as shown in Figure 2, which shows the partial variation in the thickness of the deposited film, the opening 1] A phenomenon occurs in which the deposited film thickness becomes extremely thin at the JiT part 21 and the corner part 22 of the bottom surface of No.
] This is because it is necessary to reduce the inclination angle θ of the side wall 26 of the BB 5.

Figure 6 u2, l stop V to make the electrode wiring surface more flat
This is a diagram illustrating a structure based on the second conventional method devised, that is, the anodization J& method. In this anodization method, first, the insulating film 2 and the opening 171 part 6 are formed on the substrate 1, and then the electrode layer line structure of A1 is IR-deposited on the entire surface of the substrate.The steps up to that point are shown in FIG. ξ), - is similar to the conventional method. Next, an electrode wiring pattern 4 is formed on the entire riTi substrate, and the remaining A1 vapor deposited film is anodized with a 7j Al vapor deposited film, and then transformed into an aluminum silica layer 5. The structure shown in Figure CE3 is completed. According to the second conventional method, the A1 layer with a thickness of about 1.5 mm is anodized into an aluminum oxide layer with a thickness of about 1.8 μL, so the unevenness on the electrode wiring surface is about 0.3 μ7 nm. Therefore, the flatness is improved compared to the conventional force θ of the first gQ (approximately 1.5μ7n of the etching method p).

(-However, the problem with this second conventional method is that: 1) The anodized aluminum oxide layer 5 serves as an insulating layer between the Al wirings 4; short-circuit between wirings is likely to occur due to the high R breakdown voltage and low breakdown voltage; ■The anodization of A1 I'Jy has a large penetration of aluminum oxide from the edge of the mask in the direction of the lateral force of the A1 layer; The film thickness is so thick that the amount of intrusion cannot be ignored, and therefore, it is not suitable for forming a fine π111 electrode wiring pattern.

Hereinafter, At material was explained as "Eδf3-" and the electrode wiring material I used in the second conventional method, but recently A
4 other than I. (Various different words are used.
Crab titanium material has a high melting point and excellent chemical stability, and is also highly rated for its excellent resilience. However, the only known method for forming electrode wiring on titanium nitride is the conventional method described in the previous section, and unlike the second conventional method, the electrode wiring surface is
No effective method for loading is known.

[Purpose of the invention]

The purpose of the present invention is to form a titanium nitride electrode wiring layer with a flatter electrode wiring surface compared to the conventional method described above, to minimize defects such as cracks and pinholes in the passivation film, or to suppress defects such as cracks and pinholes in the upper layer. It is an object of the present invention to provide a novel method for manufacturing a semiconductor device that can eliminate disconnections in wiring. Another aspect of the present invention is that a thin wiring electrode layer can be formed,
Therefore, it is an object of the present invention to provide a novel method for manufacturing a 7-body device that enables the formation of fine π111 electrode wiring patterns. Yet another purpose is to achieve the above-mentioned excellence.
Another object of the present invention is to provide a novel method for manufacturing a semiconductor device, which allows formation of a titanium oxide electrode wiring material more easily than by vapor deposition.

[Summary of the invention]

This invention uses silicon nitride (S13N) on a semiconductor substrate to form an electrode layer mainly made of titanium monoxide.
4) and titanium (Ti) were respectively deposited, and the 513N4 and Ti' (deposited in contact with each other) were heated to about r-1000℃, and titanium nitride (Ti) was deposited by the following reaction.
N)'.

Si; 3N4+ 4Ti 4TiN+ 38
This is therefore different from the conventional TiN electrode wiring formation in which TiN' is deposited on the substrate by sputtering. 'Also, in the conventional TiNTQ electrode wiring layer, the electrode wiring layer is TiN, whereas in the present invention, Si, Ti, 5i-Ti alloy, etc. constitute the electrode wiring material together with the main material TiN. There is.

In this invention, Si3N4, which is one of the raw materials, may be deposited by a PVD method such as a sputtering method;
It can be deposited by the D method, and is preferably deposited by the C'VD method. C'VD S 13N, iJ model is
Even if the film thickness of the Al vapor deposition film in the conventional method is much thinner than the film thickness of 15 μ?
The layer thickness of the iN-based electrode wiring layer can be made extremely thin to about 0.2 μm, making it easier to form fine patterns than with the conventional method of AI vapor deposition. becomes.

In addition, a Si3N4 film is formed on the entire surface of the semiconductor substrate, and this 51
A pattern of Ti is selectively sprayed onto the 3N4 film.
N generation generation reactive layer, S i under T1 pattern, *N
411! 'a becomes the TiN electrode wiring, and the Si 3N, I film si, , N, where T1] is not attached remains as it is.

As a result, the insulation layer between the wirings in this case has a good insulation layer.
131'J4, the problem of short circuits between wirings that occur in the aluminum oxide insulating layer of the conventional anodic oxidation method can be eliminated (iQ'), and the riN electrode wiring layer and Si
3N4 inter-wiring insulating layer was first attached to the same -Si,,N
Since the electrode wiring layer is formed in four layers, there is an advantage that the electrode wiring layer becomes extremely flat at -5V.

[Embodiments of the invention]

Embodiment 2 of the present invention will be described below with reference to FIGS. 4 and 5.

In Figure 4, 813N4 and Ti are placed on a semiconductor substrate.]
- It is a cross-sectional view showing the state of 1st and 4th arrival. In this state, a half-capacitor element is formed, an insulating film 2 such as SiO2 (T-set ii-) is formed on a thin body substrate 1, and a predetermined portion of the insulating film 2 is coated with an electrode for forming an electrode. Open the opening 6,
Next, a Si3N4 film 41 with a thickness of 2000λ is coated on the entire surface of the semiconductor substrate by low pressure plasma CVD, and then the Si3N film 41 is deposited on the entire surface of the semiconductor substrate.

A Ti film with a thickness of 2000^ was deposited on the entire surface of the J-shape 41 by vapor deposition.
A desired Ti pattern 42 was left behind by coating the film and applying this Ti 1 conversion to the electrode wiring pattern using PEP technology.

The thickness of the 513N4 film 41 to be stuck should be approximately 1oooA or less, which is approximately the same as the thickness of the TiN electrode wiring, and the thickness of the TiN electrode wiring should be about 01 μm or more.171 The composition of the deposited Si1.N ranges from sputtered stoichiometric Si;3N4 composition to S1]XNy composition containing excess S1 by plasma CVD, and It was confirmed that even non-stoichiometric SiN compositions such as i x N, l-I2 compositions can be used.

In addition, the thickness of the T1 film 42, which is at risk, is 513N4 film 41.
Due to the diffusion reaction inside, ohmic contact can be made on the substrate at the opening A.
The film thickness 42 may be approximately the same as the thickness of the sNN mock film 1.

In addition to the TiO adhesion method, the adhesion may be performed by C'VD method, ion implantation method, etc. S j:, N, 1JIr4
For example, it is formed in the lower layer of

Figure 5 shows that Si3N4 and Ti are heated and reacted.
This is a diagram illustrating a state in which an iN-based electrode wiring is formed. In this state, the semiconductor substrate 'i1. It is formed by heating at OO°C in a nitrogen atmosphere for about 1 hour. T
During the simulation of Si:3N41 under one pattern 42, T1 diffuses, and as shown in the above reaction formula, TIN becomes alJk, and the TiN-based electrode (the wiring 51 is shaped like h'y:)1 ′
Sufficient ohmic contact is made between the barrel board 1 and the board.

The heating conditions for causing the reaction are 800'C or higher; a i
J: The entire reaction can proceed at a practical speed.

゛Also formed TiN-based electrode wiring pattern (d)
Since only a short heating time is required, there is little spread of the reaction in the lateral direction, and it is possible to form an approximately T1 pattern, a row pattern, a J pattern, and a fine thread IJI wiring. Furthermore, S between the wiring
The breakdown voltage of i 3N4J Tei 41 is 2~8 x 1'
It remained extremely high at 0.06''/an.

〔Effect of the invention〕

According to the present invention, whereas TiN electrode wiring was conventionally formed by sputtering TiN, it is now formed by a heating reaction between 513N, I and Tl that are attached to a substrate. A novel method for manufacturing a semiconductor device is provided.

According to the present invention, step coverage can be achieved even when there is a step such as the electrode formation dose [1 part].
Since it can be formed by JM KaC'%, it is possible to form a Si3N4 film with a thickness of 2000A and a 2000A film as in the above example.
, A thin electrode wiring layer consisting of a TiN main layer with a total thickness of about 0.4 μm is formed by the Ti pattern with a thickness of A.

Comparing this with the thickness of the conventional electrode wiring layer made of A1 vapor-deposited film, which is 15μ7n8 degrees, it is found that the electrode wiring layer of the present invention is extremely thin. It can contribute to miniaturization of elements.

Further, according to the present invention, the thickness of the electrode wiring in the above embodiment is 0.4 μm, and the thickness of the insulating layer between the n1 wires is 02 μII+, so the difference therebetween is 02 μI11. l'before DI (i
/7 fkinj=Uni, extremely flat J1- of the electrode wiring surface
11 degrees is high. #'L'i Conventional anodization method flat 5
Even with this ratio of 0.311 rrrV, it is clear that the present invention is a method with excellent flatness. This is a method that can form a step shape that is extremely advantageous when forming the entire multilayer wiring.

In addition, TIN has a high melting point of <2950°C and is chemically stable, such as blocking properties. Therefore, it is possible to heat-treat the semiconductor device 7 after wiring at a temperature of 1000°C or higher. The overall yield of semiconductor devices can be improved by performing heat treatment such as changing element characteristics (for example, changing current amplification factor) after wiring.

As described above, the present invention is suitable for flat and fine-grained Ti.
A new half), i'i, 1 for forming electrode wiring of N-based material
4; Device manufacturing method.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view showing the electrode wiring structure formed by the conventional etching method, Figure 2 is a diagram illustrating the drawback of step coverage by the vapor deposition method, and Figure 3 is the electrode wiring structure formed by the conventional anodization method. FIG. 4 is a cross-sectional view showing the Si3N4 and Ti mixed state of the embodiment of the present invention, and FIG.
The figure is a sectional view showing the state of the embodiment of the present invention after heating. 1...) 1 part conductor substrate, 2... insulating layer, 4... A
l Electrode wiring, 41... silicon nitride (S13N4) film,
42...Ticunium (Ti) pattern, 51. Titanium nitride (TiN) electrode wiring. Patent applicant: Tokyo Shibaura Electric Co., Ltd. Yanagi Figure 1 Figure 2 Tei Figure 3

Claims (1)

[Claims] 1. In a method for manufacturing a semiconductor device in which wiring or electrodes are formed using a titanium nitride material, silicon vapor nitride and titanium are grown on a semiconductor substrate and then heated to cause a reaction, thereby forming titanium nitride. A method of manufacturing a semiconductor device whose main feature is to form wiring or electrodes. 2. A silicon nitride film grown by CVD technology on a semiconductor substrate, and a selective material on the C'VD silicon nitride film:
, ',: Patent M in which a titanium nitride film is heated and reacted to form a wiring or an electric wire mainly made of titanium nitride on a part of the insulating film made of the C'VD silicon nitride film. '! The manufacturing method according to item 1 of the scope of requirements.