JPS5933989A - サンプル位相調整方式 - Google Patents

サンプル位相調整方式

Info

Publication number
JPS5933989A
JPS5933989A JP57143249A JP14324982A JPS5933989A JP S5933989 A JPS5933989 A JP S5933989A JP 57143249 A JP57143249 A JP 57143249A JP 14324982 A JP14324982 A JP 14324982A JP S5933989 A JPS5933989 A JP S5933989A
Authority
JP
Japan
Prior art keywords
output
signal
outputs
clock
delay line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57143249A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0157871B2 (enExample
Inventor
Mikio Shimizu
幹夫 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57143249A priority Critical patent/JPS5933989A/ja
Publication of JPS5933989A publication Critical patent/JPS5933989A/ja
Publication of JPH0157871B2 publication Critical patent/JPH0157871B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/64—Circuits for processing colour signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Color Television Systems (AREA)
JP57143249A 1982-08-20 1982-08-20 サンプル位相調整方式 Granted JPS5933989A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57143249A JPS5933989A (ja) 1982-08-20 1982-08-20 サンプル位相調整方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57143249A JPS5933989A (ja) 1982-08-20 1982-08-20 サンプル位相調整方式

Publications (2)

Publication Number Publication Date
JPS5933989A true JPS5933989A (ja) 1984-02-24
JPH0157871B2 JPH0157871B2 (enExample) 1989-12-07

Family

ID=15334350

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57143249A Granted JPS5933989A (ja) 1982-08-20 1982-08-20 サンプル位相調整方式

Country Status (1)

Country Link
JP (1) JPS5933989A (enExample)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5571390A (en) * 1978-11-24 1980-05-29 Hitachi Ltd Clock stabilizing circuit
JPS56117425A (en) * 1980-02-21 1981-09-14 Nec Corp Analog-digital converting circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5571390A (en) * 1978-11-24 1980-05-29 Hitachi Ltd Clock stabilizing circuit
JPS56117425A (en) * 1980-02-21 1981-09-14 Nec Corp Analog-digital converting circuit

Also Published As

Publication number Publication date
JPH0157871B2 (enExample) 1989-12-07

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