JPS56117425A - Analog-digital converting circuit - Google Patents

Analog-digital converting circuit

Info

Publication number
JPS56117425A
JPS56117425A JP2136180A JP2136180A JPS56117425A JP S56117425 A JPS56117425 A JP S56117425A JP 2136180 A JP2136180 A JP 2136180A JP 2136180 A JP2136180 A JP 2136180A JP S56117425 A JPS56117425 A JP S56117425A
Authority
JP
Japan
Prior art keywords
signal
mean value
analog
value
set value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2136180A
Other languages
Japanese (ja)
Inventor
Katsumi Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP2136180A priority Critical patent/JPS56117425A/en
Publication of JPS56117425A publication Critical patent/JPS56117425A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/129—Means for adapting the input signal to the range the converter can handle, e.g. limiting, pre-scaling ; Out-of-range indication
    • H03M1/1295—Clamping, i.e. adjusting the DC level of the input signal to a predetermined value

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Color Television Systems (AREA)

Abstract

PURPOSE:To realize a stable control of the DC level without receiving any effect of the shift of sampling points or the noise, securing a coincidence between the mean value of the coded output in the prescribed sampling section of the analog signal and the set value. CONSTITUTION:The NTSC color TV signal A applied to the input terminal 1 enters the A-D converter 3 through the differential amplifier 2 and is converted into the digital signal D to be delivered to the terminal 8. The signal D also enters the mean value arithmetic circuit 4 to calculate the means value of the section which contains the color burst of the back porch by the gate pulse delivered from the gate pulse generator 7. The mean value is compared with the set value through the digital comparator 5, and the result of comparison is converted into the analog signals through the D-A converter 6 to be fed back to one input of the amplifier 2. Then the DC level of the input analog signal is changed to secure a coincidence between the mean value of the coded output and the set value.
JP2136180A 1980-02-21 1980-02-21 Analog-digital converting circuit Pending JPS56117425A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2136180A JPS56117425A (en) 1980-02-21 1980-02-21 Analog-digital converting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2136180A JPS56117425A (en) 1980-02-21 1980-02-21 Analog-digital converting circuit

Publications (1)

Publication Number Publication Date
JPS56117425A true JPS56117425A (en) 1981-09-14

Family

ID=12052950

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2136180A Pending JPS56117425A (en) 1980-02-21 1980-02-21 Analog-digital converting circuit

Country Status (1)

Country Link
JP (1) JPS56117425A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5847327A (en) * 1981-09-16 1983-03-19 Nippon Telegr & Teleph Corp <Ntt> Analog-to-digital converter
JPS58186223A (en) * 1982-04-02 1983-10-31 トムソン−セエスエフ Analog signal levelling digital circuit
JPS5933989A (en) * 1982-08-20 1984-02-24 Nec Corp Sample phase controlling system
JPS6178221A (en) * 1984-09-26 1986-04-21 Matsushita Electric Ind Co Ltd Clamp circuit
JPS62281618A (en) * 1986-05-30 1987-12-07 Anritsu Corp Eliminating circuit for dc offset voltage
JPS63160419A (en) * 1986-12-24 1988-07-04 Yaskawa Electric Mfg Co Ltd Magnetic rotary encoder

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5091248A (en) * 1973-12-12 1975-07-21
JPS53114653A (en) * 1977-03-16 1978-10-06 Yokogawa Hokushin Electric Corp Analog operation unit
JPS5448148A (en) * 1977-09-26 1979-04-16 Hitachi Ltd A/d converter circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5091248A (en) * 1973-12-12 1975-07-21
JPS53114653A (en) * 1977-03-16 1978-10-06 Yokogawa Hokushin Electric Corp Analog operation unit
JPS5448148A (en) * 1977-09-26 1979-04-16 Hitachi Ltd A/d converter circuit

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5847327A (en) * 1981-09-16 1983-03-19 Nippon Telegr & Teleph Corp <Ntt> Analog-to-digital converter
JPS58186223A (en) * 1982-04-02 1983-10-31 トムソン−セエスエフ Analog signal levelling digital circuit
JPS5933989A (en) * 1982-08-20 1984-02-24 Nec Corp Sample phase controlling system
JPH0157871B2 (en) * 1982-08-20 1989-12-07 Nippon Electric Co
JPS6178221A (en) * 1984-09-26 1986-04-21 Matsushita Electric Ind Co Ltd Clamp circuit
JPS62281618A (en) * 1986-05-30 1987-12-07 Anritsu Corp Eliminating circuit for dc offset voltage
JPS63160419A (en) * 1986-12-24 1988-07-04 Yaskawa Electric Mfg Co Ltd Magnetic rotary encoder

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