JPS5932001A - シ−ケンスコントロ−ラのデ−タメモリユニツト - Google Patents

シ−ケンスコントロ−ラのデ−タメモリユニツト

Info

Publication number
JPS5932001A
JPS5932001A JP14191382A JP14191382A JPS5932001A JP S5932001 A JPS5932001 A JP S5932001A JP 14191382 A JP14191382 A JP 14191382A JP 14191382 A JP14191382 A JP 14191382A JP S5932001 A JPS5932001 A JP S5932001A
Authority
JP
Japan
Prior art keywords
sequence controller
data memory
microprocessor
data
output port
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14191382A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0547841B2 (enExample
Inventor
Yoshio Kasai
葛西　由夫
Takehiko Hayashi
林　毅彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14191382A priority Critical patent/JPS5932001A/ja
Publication of JPS5932001A publication Critical patent/JPS5932001A/ja
Publication of JPH0547841B2 publication Critical patent/JPH0547841B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/10—Plc systems
    • G05B2219/11—Plc I-O input output
    • G05B2219/1188—Detection of inserted boards, inserting extra memory, availability of boards

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Programmable Controllers (AREA)
JP14191382A 1982-08-16 1982-08-16 シ−ケンスコントロ−ラのデ−タメモリユニツト Granted JPS5932001A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14191382A JPS5932001A (ja) 1982-08-16 1982-08-16 シ−ケンスコントロ−ラのデ−タメモリユニツト

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14191382A JPS5932001A (ja) 1982-08-16 1982-08-16 シ−ケンスコントロ−ラのデ−タメモリユニツト

Publications (2)

Publication Number Publication Date
JPS5932001A true JPS5932001A (ja) 1984-02-21
JPH0547841B2 JPH0547841B2 (enExample) 1993-07-19

Family

ID=15303073

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14191382A Granted JPS5932001A (ja) 1982-08-16 1982-08-16 シ−ケンスコントロ−ラのデ−タメモリユニツト

Country Status (1)

Country Link
JP (1) JPS5932001A (enExample)

Also Published As

Publication number Publication date
JPH0547841B2 (enExample) 1993-07-19

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