JPS5925814U - low frequency amplifier circuit - Google Patents

low frequency amplifier circuit

Info

Publication number
JPS5925814U
JPS5925814U JP12043182U JP12043182U JPS5925814U JP S5925814 U JPS5925814 U JP S5925814U JP 12043182 U JP12043182 U JP 12043182U JP 12043182 U JP12043182 U JP 12043182U JP S5925814 U JPS5925814 U JP S5925814U
Authority
JP
Japan
Prior art keywords
transistor
emitter
collector
transistors
low frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12043182U
Other languages
Japanese (ja)
Other versions
JPH036022Y2 (en
Inventor
水本 正夫
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP12043182U priority Critical patent/JPS5925814U/en
Publication of JPS5925814U publication Critical patent/JPS5925814U/en
Application granted granted Critical
Publication of JPH036022Y2 publication Critical patent/JPH036022Y2/ja
Granted legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、低周波増幅回路の従来例、第2図は本考案の
一実施例を示す。 主な図番の説明、1・・・・・・入力端子、2.3・・
・・・・電流源、4.5・・・・・・逆流防止ダイオー
ド、6・・・・・・第3の入力段トランジスタ、7・・
・・・・第4の入力段トランジスタ、16・・・・・・
出力端子、17・・・・・・第1のアイドリング電流補
償回路、21・曲・第2のアイドリング電流補償回路、
26・・・・・・中点電圧端子。
FIG. 1 shows a conventional example of a low frequency amplifier circuit, and FIG. 2 shows an embodiment of the present invention. Explanation of main drawing numbers, 1...Input terminal, 2.3...
...Current source, 4.5...Reverse current prevention diode, 6...Third input stage transistor, 7...
...Fourth input stage transistor, 16...
Output terminal, 17...first idling current compensation circuit, 21, song, second idling current compensation circuit,
26...Midpoint voltage terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 第1のトランジスタのエミッタに電源を接続し、該第1
のトランジスタのコレクタに第2のトランジスタのコレ
クタを接続し、該第2のトランジスタのエミッタに第1
の抵抗回路を介して第3のトランジスタのエミッタを接
続し、該第3のトランジスタのコレクタに第4のトラン
ジスタのコレクタを接続し、該第4のトランジスタのエ
ミッタをアース端子に接続し、第5のトランジスタのエ
ミッタに電源を接続し、該第5のトランジスタのコレク
タに第6のトランジスタのコレクタを接続し、該第6の
トランジスタのエミッタに第2の抵抗回路を介して第7
のトランジスタのエミッタを接続し、該第7のトランジ
スタのコレクタに第8のトランジスタのコレクタを接続
し、該第8のトランジスタのエミッタをアース端子に接
続し、前記第2、第3、第6及び第7のトランジスタの
ベースに入力端子を接続し、前記第1と第5のトランジ
スタのベースを共通接続し、第4と第8のトランジスタ
のベースを共通接続し、前記第6及び第7のトランジス
タのコレクタに、各々の出力段トランジスタのベースを
接続し、該出力段トランジスタ及び前記第2の抵抗回路
に出力端子を設けたことを特徴とする低周波増幅回路。
A power supply is connected to the emitter of the first transistor, and the first transistor is connected to the emitter of the first transistor.
The collector of the second transistor is connected to the collector of the transistor, and the emitter of the second transistor is connected to the collector of the first transistor.
The emitter of the third transistor is connected through a resistor circuit, the collector of the fourth transistor is connected to the collector of the third transistor, the emitter of the fourth transistor is connected to the ground terminal, and the emitter of the fourth transistor is connected to the ground terminal. A power supply is connected to the emitter of the transistor, a collector of the sixth transistor is connected to the collector of the fifth transistor, and a power supply is connected to the emitter of the sixth transistor via the second resistor circuit.
The emitters of the transistors are connected, the collectors of the eighth transistors are connected to the collectors of the seventh transistors, the emitters of the eighth transistors are connected to the ground terminal, and the second, third, sixth and An input terminal is connected to the base of the seventh transistor, the bases of the first and fifth transistors are commonly connected, the bases of the fourth and eighth transistors are commonly connected, and the sixth and seventh transistors are connected in common. A low frequency amplifier circuit, characterized in that a base of each output stage transistor is connected to the collector of the low frequency amplifier circuit, and an output terminal is provided to the output stage transistor and the second resistor circuit.
JP12043182U 1982-08-06 1982-08-06 low frequency amplifier circuit Granted JPS5925814U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12043182U JPS5925814U (en) 1982-08-06 1982-08-06 low frequency amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12043182U JPS5925814U (en) 1982-08-06 1982-08-06 low frequency amplifier circuit

Publications (2)

Publication Number Publication Date
JPS5925814U true JPS5925814U (en) 1984-02-17
JPH036022Y2 JPH036022Y2 (en) 1991-02-15

Family

ID=30276019

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12043182U Granted JPS5925814U (en) 1982-08-06 1982-08-06 low frequency amplifier circuit

Country Status (1)

Country Link
JP (1) JPS5925814U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5437668A (en) * 1977-08-31 1979-03-20 Sansui Electric Co Differential amplifier

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5437668A (en) * 1977-08-31 1979-03-20 Sansui Electric Co Differential amplifier

Also Published As

Publication number Publication date
JPH036022Y2 (en) 1991-02-15

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