JPS6178422U - - Google Patents

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Publication number
JPS6178422U
JPS6178422U JP16402684U JP16402684U JPS6178422U JP S6178422 U JPS6178422 U JP S6178422U JP 16402684 U JP16402684 U JP 16402684U JP 16402684 U JP16402684 U JP 16402684U JP S6178422 U JPS6178422 U JP S6178422U
Authority
JP
Japan
Prior art keywords
amplifier
output transistor
output
transistors
amplification stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16402684U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP16402684U priority Critical patent/JPS6178422U/ja
Publication of JPS6178422U publication Critical patent/JPS6178422U/ja
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路図、及び
第2図は従来の低周波増幅器の電力増幅段を示す
回路図である。 主な図番の説明、11…OPアンプ、12…バ
イパス回路、13…第1トランジスタ、14…第
2トランジスタ、20…SEPP回路。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a power amplification stage of a conventional low frequency amplifier. Explanation of main drawing numbers, 11...OP amplifier, 12 ...bypass circuit, 13...first transistor, 14...second transistor, 20...SEPP circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] OPアンプから成る電圧増幅段と、シングル・
エンデツド・プツシユプル接続された出力トラン
ジスタを備える出力回路及びコレクタ・エミツタ
間が前記出力トランジスタのベース間に直列接続
される互いに逆極性の第1及び第2トランジスタ
を備えるバイアス回路から成る電力増幅段とで構
成され、前記OPアンプの出力端を前記バイアス
回路の第1及び第2トランジスタのエミツタ同志
の接続点に接続したことを特徴とする低周波増幅
器。
A voltage amplification stage consisting of an OP amplifier and a single
A power amplification stage comprising an output circuit including an output transistor connected in an end-push-pull manner, and a bias circuit including first and second transistors having opposite polarities connected in series between the collector and emitter of the output transistor and the base of the output transistor. 1. A low frequency amplifier comprising: an output terminal of the OP amplifier connected to a connection point between emitters of the first and second transistors of the bias circuit.
JP16402684U 1984-10-30 1984-10-30 Pending JPS6178422U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16402684U JPS6178422U (en) 1984-10-30 1984-10-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16402684U JPS6178422U (en) 1984-10-30 1984-10-30

Publications (1)

Publication Number Publication Date
JPS6178422U true JPS6178422U (en) 1986-05-26

Family

ID=30721891

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16402684U Pending JPS6178422U (en) 1984-10-30 1984-10-30

Country Status (1)

Country Link
JP (1) JPS6178422U (en)

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