JPS61143321U - - Google Patents
Info
- Publication number
- JPS61143321U JPS61143321U JP2534685U JP2534685U JPS61143321U JP S61143321 U JPS61143321 U JP S61143321U JP 2534685 U JP2534685 U JP 2534685U JP 2534685 U JP2534685 U JP 2534685U JP S61143321 U JPS61143321 U JP S61143321U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- power supply
- supply terminal
- emitter
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Amplifiers (AREA)
Description
第１図及び第２図はこの考案による多重帰還増
幅器の回路図、第３図及び第４図は従来の多重帰
還増幅器の回路図である。
１１：入力端子、１２：出力端子、１３，１３
′，２５，２５′：電源用端子、１４，１４′：
第一トランジスタ、１５，２４，２４′：第二ト
ランジスタ、１６，１６′，１７，１７′，１８
，１９，１９′，２０，２０′，２１，２１′：
抵抗器、２２，２２′，２３：コンデンサ、２６
，２６′：第三トランジスタ。
1 and 2 are circuit diagrams of a multiple feedback amplifier according to this invention, and FIGS. 3 and 4 are circuit diagrams of a conventional multiple feedback amplifier. 11: Input terminal, 12: Output terminal, 13, 13
', 25, 25': Power supply terminal, 14, 14':
First transistor, 15, 24, 24': Second transistor, 16, 16', 17, 17', 18
, 19, 19', 20, 20', 21, 21':
Resistor, 22, 22', 23: Capacitor, 26
, 26': third transistor.
Claims (1)
の電源用端子に抵抗器を介してコレクタが接続さ
れ、上記負の電源用端子に抵抗器を介してエミツ
タが接続されたＮＰＮ型の第一トランジスタと、
該第一トランジスタのコレクタにベースが接続さ
れ、上記正の電源用端子に抵抗器を介してエミツ
タが接続されたＰＮＰ型の第二トランジスタと、
該第二トランジスタのコレクタと上記第一トラン
ジスタのエミツタ間に接続された第一帰還回路と
、上記第二トランジスタのエミツタと上記第一ト
ランジスタのベース間に接続された第二帰還回路
から成る第一増幅手段と、該第一増幅手段と同じ
構成であるがトランジスタ及び電源用端子が互い
に逆の極性を持つ第二増幅手段とにより構成され
ていることを特徴とする多重帰還増幅器。 NPN type with a positive power supply terminal, a negative power supply terminal, a collector connected to the above positive power supply terminal via a resistor, and an emitter connected to the above negative power supply terminal via a resistor. a first transistor of
a PNP type second transistor whose base is connected to the collector of the first transistor and whose emitter is connected to the positive power supply terminal via a resistor;
a first feedback circuit connected between the collector of the second transistor and the emitter of the first transistor; and a second feedback circuit connected between the emitter of the second transistor and the base of the first transistor. A multiple feedback amplifier comprising an amplifying means and a second amplifying means having the same structure as the first amplifying means but having transistors and power supply terminals having opposite polarities.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2534685U JPH0520010Y2 (en) | 1985-02-22 | 1985-02-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2534685U JPH0520010Y2 (en) | 1985-02-22 | 1985-02-22 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61143321U true JPS61143321U (en) | 1986-09-04 |
| JPH0520010Y2 JPH0520010Y2 (en) | 1993-05-26 |
Family
ID=30520337
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2534685U Expired - Lifetime JPH0520010Y2 (en) | 1985-02-22 | 1985-02-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0520010Y2 (en) |
-
1985
- 1985-02-22 JP JP2534685U patent/JPH0520010Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0520010Y2 (en) | 1993-05-26 |
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