JPS62203536U - - Google Patents
Info
- Publication number
- JPS62203536U JPS62203536U JP9275686U JP9275686U JPS62203536U JP S62203536 U JPS62203536 U JP S62203536U JP 9275686 U JP9275686 U JP 9275686U JP 9275686 U JP9275686 U JP 9275686U JP S62203536 U JPS62203536 U JP S62203536U
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- amplification circuit
- supply line
- bias voltage
- voltage supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 11
- 230000003321 amplification Effects 0.000 claims 3
- 238000003199 nucleic acid amplification method Methods 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Superheterodyne Receivers (AREA)
- Noise Elimination (AREA)
Description
第1図は本考案の一実施例を示す図、第2図は
従来例を示す図である。
5……差動増幅回路、6,7……コンデンサ(
第1のコンデンサ)、11……コンデンサ(第2
のコンデンサ)、12……ダイオード(スイツチ
ング回路)。
FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing a conventional example. 5 ... Differential amplifier circuit, 6, 7... Capacitor (
capacitor (first capacitor), 11... capacitor (second capacitor), 11...capacitor (second capacitor)
capacitor), 12...diode (switching circuit).
Claims (1)
と、この差動増幅回路のバイアス電圧供給線路と
基準電位点間に接続され且つ前記バイアス電圧供
給線路の雑音成分を除去するための第1のコンデ
ンサと、バンド切換操作に応答して前記第1のコ
ンデンサと並列に第2のコンデンサを選択的に接
続するためのスイツチング回路とを具備したこと
を特徴とするラジオ受信機。 an intermediate frequency amplification circuit composed of a differential amplification circuit; and a first capacitor connected between a bias voltage supply line of the differential amplification circuit and a reference potential point and for removing noise components of the bias voltage supply line. and a switching circuit for selectively connecting a second capacitor in parallel with the first capacitor in response to a band switching operation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9275686U JPH0336122Y2 (en) | 1986-06-17 | 1986-06-17 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9275686U JPH0336122Y2 (en) | 1986-06-17 | 1986-06-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62203536U true JPS62203536U (en) | 1987-12-25 |
JPH0336122Y2 JPH0336122Y2 (en) | 1991-07-31 |
Family
ID=30954745
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9275686U Expired JPH0336122Y2 (en) | 1986-06-17 | 1986-06-17 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0336122Y2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016115977A (en) * | 2014-12-11 | 2016-06-23 | パナソニック株式会社 | Receiver and distortion prevention method thereon, semiconductor device and electronic apparatus |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015231123A (en) * | 2014-06-04 | 2015-12-21 | 富士通株式会社 | Radio equipment |
-
1986
- 1986-06-17 JP JP9275686U patent/JPH0336122Y2/ja not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016115977A (en) * | 2014-12-11 | 2016-06-23 | パナソニック株式会社 | Receiver and distortion prevention method thereon, semiconductor device and electronic apparatus |
Also Published As
Publication number | Publication date |
---|---|
JPH0336122Y2 (en) | 1991-07-31 |