JPS61139033U - - Google Patents

Info

Publication number
JPS61139033U
JPS61139033U JP2066985U JP2066985U JPS61139033U JP S61139033 U JPS61139033 U JP S61139033U JP 2066985 U JP2066985 U JP 2066985U JP 2066985 U JP2066985 U JP 2066985U JP S61139033 U JPS61139033 U JP S61139033U
Authority
JP
Japan
Prior art keywords
trap
circuit
intermediate frequency
carrier frequency
video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2066985U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2066985U priority Critical patent/JPS61139033U/ja
Publication of JPS61139033U publication Critical patent/JPS61139033U/ja
Pending legal-status Critical Current

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Landscapes

  • Superheterodyne Receivers (AREA)
  • Noise Elimination (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路図、第2
図はそのIF段の出力特性を示す図である。第3
図は従来のチユーナの要部を示す回路図、第4図
はそのIF段の出力特性を示す図である。 4:中間周波増幅回路、8,9:トラツプ回路
Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure shows the output characteristics of the IF stage. Third
The figure is a circuit diagram showing the main parts of a conventional tuner, and FIG. 4 is a diagram showing the output characteristics of its IF stage. 4: intermediate frequency amplification circuit, 8, 9: trap circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 広帯域の中間周波数フイルタが出力側に接続さ
れた中間周波増幅回路を備えるチユーナに於いて
、前記中間周波増幅回路の入力側と出力側にそれ
ぞれトラツプ回路を設け、このトラツプ回路の一
方を上側隣々チヤンネルの映像IFキヤリア周波
数をトラツプ点とする直列共振回路で構成し、他
方のトラツプ回路を下側隣々チヤンネルの映像I
Fキヤリア周波数をトラツプ点とする並列共振回
路で構成したことを特徴とするチユーナ。
In a tuner equipped with an intermediate frequency amplifier circuit in which a wideband intermediate frequency filter is connected to the output side, a trap circuit is provided on the input side and the output side of the intermediate frequency amplifier circuit, respectively, and one of the trap circuits is connected to the upper adjacent trap circuit. It consists of a series resonant circuit with the video IF carrier frequency of the channel as the trap point, and the other trap circuit is connected to the video IF carrier frequency of the channel below.
A tuner comprising a parallel resonant circuit with the F carrier frequency as a trap point.
JP2066985U 1985-02-15 1985-02-15 Pending JPS61139033U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2066985U JPS61139033U (en) 1985-02-15 1985-02-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2066985U JPS61139033U (en) 1985-02-15 1985-02-15

Publications (1)

Publication Number Publication Date
JPS61139033U true JPS61139033U (en) 1986-08-28

Family

ID=30511377

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2066985U Pending JPS61139033U (en) 1985-02-15 1985-02-15

Country Status (1)

Country Link
JP (1) JPS61139033U (en)

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