JPS62133486U - - Google Patents

Info

Publication number
JPS62133486U
JPS62133486U JP1888986U JP1888986U JPS62133486U JP S62133486 U JPS62133486 U JP S62133486U JP 1888986 U JP1888986 U JP 1888986U JP 1888986 U JP1888986 U JP 1888986U JP S62133486 U JPS62133486 U JP S62133486U
Authority
JP
Japan
Prior art keywords
transistor
collector
transistors
voltage
differential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1888986U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1888986U priority Critical patent/JPS62133486U/ja
Publication of JPS62133486U publication Critical patent/JPS62133486U/ja
Pending legal-status Critical Current

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  • Processing Of Color Television Signals (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の帯域増幅回路の一実施例を示
す回路図、第2図は第1図の回路における入力振
幅(PIF出力)に対する出力振幅(色信号出力
)の特性を示す図、第3図は従来の帯域増幅回路
を示す回路図、第4図は第3図の回路における入
力振幅に対する出力振幅の特性を示す図である。 11……IC、12……入力端子、13……3
.58MHzテイクオフ回路、14……出力端子
、15……スイツチ、Q1〜Q10……トランジ
スタ、R1〜R8……抵抗、I……定電流源、C
1,C2……コンデンサ。
FIG. 1 is a circuit diagram showing an embodiment of the band amplification circuit of the present invention, FIG. 2 is a diagram showing the characteristics of the output amplitude (color signal output) with respect to the input amplitude (PIF output) in the circuit of FIG. FIG. 3 is a circuit diagram showing a conventional band amplification circuit, and FIG. 4 is a diagram showing the characteristics of output amplitude with respect to input amplitude in the circuit of FIG. 11...IC, 12...input terminal, 13...3
.. 58MHz take-off circuit, 14...Output terminal, 15...Switch, Q1-Q10...Transistor, R1-R8...Resistor, I...Constant current source, C
1, C2... Capacitor.

Claims (1)

【実用新案登録請求の範囲】 映像中間周波信号が入力される入力端子と、 この入力端子に抵抗を介して接続され、2種類
の直流電圧を切り換えて前記入力端子に加えるた
めのスイツチと、 前記入力端子にコンデンサを介して接続され、
前記映像中間周波信号より色信号を取り出すため
の帯域通過回路と、 この帯域通過回路からの色信号を差動対をなす
第1、第2のトランジスタの内の第1のトランジ
スタのベースに入力し、そのコレクタを電圧源に
接続し両方のトランジスタのベースにバイアス電
圧を与え、共通エミツタには定電流源を接続し、
増幅動作を行う差動増幅手段と、 差動対をなす第3、第4のトランジスタの内の
第3のトランジスタのコレクタを第1の負荷抵抗
を介して電圧源に接続し、第4のトランジスタの
コレクタは電圧源に接続し共通エミツタは第5の
トランジスタのコレクタ・エミツタ路を介して前
記差動増幅手段の第2のトランジスタのコレクタ
に接続して成る第1の差動増幅器と、差動対をな
す第6、第7のトランジスタの内の第6のトラン
ジスタのコレクタを第2の負荷抵抗を介して電圧
源に接続し第7のトランジスタのコレクタは電圧
源に接続し共通エミツタは第8のトランジスタの
コレクタ・エミツタ路を介して前記差動増幅手段
の第2のトランジスタのコレクタに接続して成る
第2の差動増幅器とから構成され、前記第3、第
6のトランジスタのベースを共通に接続し前記第
4、第7のトランジスタのベースを共通に接続し
前記第3、第4のトランジスタのベース間にAC
C制御電圧を与え、前記第5のトランジスタのベ
ースには前記入力端子からの直流電圧を与え、前
記第8のトランジスタのベースにはバイアス電圧
を与えるようにし、前記スイツチの切換えによつ
て、前記第1、第2の差動増幅器のいずれか一方
を動作させ、前記第3又は第6のトランジスタの
コレクタより利得の異なつた色信号出力を取り出
す回路とを具備したことを特徴とする帯域増幅回
路。
[Claims for Utility Model Registration] An input terminal into which a video intermediate frequency signal is input; a switch connected to this input terminal via a resistor for switching between two types of DC voltage and applying the same to the input terminal; Connected to the input terminal via a capacitor,
a bandpass circuit for extracting a color signal from the video intermediate frequency signal; and a bandpass circuit for inputting the color signal from the bandpass circuit to the base of a first transistor of the first and second transistors forming a differential pair. , its collector is connected to a voltage source to give a bias voltage to the bases of both transistors, and a constant current source is connected to the common emitter.
A differential amplification means for performing an amplification operation; a collector of a third transistor of the third and fourth transistors forming the differential pair is connected to a voltage source via a first load resistor; a first differential amplifier, the collector of which is connected to a voltage source and whose common emitter is connected to the collector of the second transistor of the differential amplification means via a collector-emitter path of a fifth transistor; The collector of the sixth transistor of the pair of sixth and seventh transistors is connected to the voltage source via the second load resistor, the collector of the seventh transistor is connected to the voltage source, and the common emitter of the eighth transistor is connected to the voltage source. a second differential amplifier connected to the collector of the second transistor of the differential amplification means via the collector-emitter path of the transistor, and the bases of the third and sixth transistors are common. The bases of the fourth and seventh transistors are connected in common, and an AC voltage is connected between the bases of the third and fourth transistors.
C control voltage is applied to the base of the fifth transistor, a DC voltage from the input terminal is applied to the base of the fifth transistor, and a bias voltage is applied to the base of the eighth transistor. A band amplifier circuit comprising: a circuit for operating one of the first and second differential amplifiers and extracting color signal outputs having different gains from the collectors of the third and sixth transistors. .
JP1888986U 1986-02-14 1986-02-14 Pending JPS62133486U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1888986U JPS62133486U (en) 1986-02-14 1986-02-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1888986U JPS62133486U (en) 1986-02-14 1986-02-14

Publications (1)

Publication Number Publication Date
JPS62133486U true JPS62133486U (en) 1987-08-22

Family

ID=30812981

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1888986U Pending JPS62133486U (en) 1986-02-14 1986-02-14

Country Status (1)

Country Link
JP (1) JPS62133486U (en)

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