JPS62158977U - - Google Patents
Info
- Publication number
- JPS62158977U JPS62158977U JP1986046418U JP4641886U JPS62158977U JP S62158977 U JPS62158977 U JP S62158977U JP 1986046418 U JP1986046418 U JP 1986046418U JP 4641886 U JP4641886 U JP 4641886U JP S62158977 U JPS62158977 U JP S62158977U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- voltage source
- base
- control voltage
- whose
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Picture Signal Circuits (AREA)
Description
第1図は本考案の一実施例に係るAGCゲイン
切換え回路の回路構成図、第2図は従来のAGC
ゲイン切換え回路の回路構成図である。
40…平衡変調器、41,42,43,44,
45,46,571,572,591,592,
63,66,68,71…トランジスタ、47,
50,58,60…制御電圧源、48,51,5
6,64,70…抵抗器、49,54…所定電圧
源、52…入力信号源、53,55,62,65
,67,69…定電流源、61…引算回路。
Fig. 1 is a circuit diagram of an AGC gain switching circuit according to an embodiment of the present invention, and Fig. 2 is a circuit diagram of a conventional AGC gain switching circuit.
FIG. 3 is a circuit configuration diagram of a gain switching circuit. 40...Balanced modulator, 41, 42, 43, 44,
45,46,57 1 ,57 2 ,59 1 ,59 2 ,
63, 66, 68, 71...transistor, 47,
50, 58, 60... Control voltage source, 48, 51, 5
6, 64, 70...Resistor, 49, 54...Predetermined voltage source, 52...Input signal source, 53, 55, 62, 65
, 67, 69...constant current source, 61...subtraction circuit.
Claims (1)
源に接続され、第2のトランジスタのベースが所
定電圧源に接続され、且つエミツタが共通接続さ
れた第1のトランジスタ対と、第3のトランジス
タのベースが第2の制御電圧源に接続され、第4
のトランジスタのベースが前記所定電圧源に接続
され、且つエミツタが共通接続された第2のトラ
ンジスタ対と、それぞれのコレクタが前記第1及
び第2のトランジスタ対のエミツタに接続され、
それぞれのエミツタが抵抗器を介して接続される
と共に定電流源に接続された第5及び第6のトラ
ンジスタから成る第3のトランジスタ対とで構成
される平衡変調器と、 前記平衡変調器の第1のトランジスタに並列に
接続され、そのベースが第3の制御電圧源に接続
された第7のトランジスタと、 前記平衡変調器の第3のトランジスタに並列に
接続され、そのベースが第4の制御電圧源に接続
された第8のトランジスタと、 前記平衡変調器の第2及び第4のトランジスタ
のコレクタ出力の差を取る引算回路と、 を具備し、前記平衡変調器の第1乃至第4の制御
電圧をコントロールすることによつて、前記平衡
変調器の第5のトランジスタのベースに入力され
た信号を、6dBゲインアツプ又は12dBゲイ
ンアツプして前記引算回路から出力することを特
徴とするAGCゲイン切換え回路。[Claims for Utility Model Registration] A first transistor in which the base of the first transistor is connected to a first control voltage source, the base of the second transistor is connected to a predetermined voltage source, and the emitters are commonly connected. a fourth transistor, the base of the third transistor being connected to the second control voltage source;
a second pair of transistors whose bases are connected to the predetermined voltage source and whose emitters are commonly connected, and whose collectors are connected to the emitters of the first and second transistor pairs,
and a third transistor pair consisting of a fifth and a sixth transistor, each emitter of which is connected via a resistor and connected to a constant current source; and a third transistor pair of the balanced modulator; a seventh transistor connected in parallel to the first transistor and whose base is connected to a third control voltage source; and a seventh transistor connected in parallel to the third transistor of the balanced modulator and whose base is connected to a fourth control voltage source. an eighth transistor connected to a voltage source; and a subtraction circuit that takes the difference between the collector outputs of the second and fourth transistors of the balanced modulator, The AGC gain is characterized in that the signal input to the base of the fifth transistor of the balanced modulator is increased in gain by 6 dB or 12 dB and outputted from the subtraction circuit by controlling the control voltage of the control voltage. switching circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986046418U JPS62158977U (en) | 1986-03-29 | 1986-03-29 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986046418U JPS62158977U (en) | 1986-03-29 | 1986-03-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62158977U true JPS62158977U (en) | 1987-10-08 |
Family
ID=30866061
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986046418U Pending JPS62158977U (en) | 1986-03-29 | 1986-03-29 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62158977U (en) |
-
1986
- 1986-03-29 JP JP1986046418U patent/JPS62158977U/ja active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS6251813U (en) | ||
JPS62158977U (en) | ||
JPS635718U (en) | ||
JPH0390511U (en) | ||
JPH0738981Y2 (en) | Constant current source circuit | |
JPS6315618U (en) | ||
JPS6226921U (en) | ||
JPS6342763Y2 (en) | ||
JPH0221782Y2 (en) | ||
JPS6355617U (en) | ||
JPS5826214U (en) | Gain control amplifier balance adjustment circuit | |
JPS6160519U (en) | ||
JPS62171214U (en) | ||
JPS62169521U (en) | ||
JPS586417U (en) | variable gain amplifier | |
JPS62117825U (en) | ||
JPH01160716U (en) | ||
JPH0386616U (en) | ||
JPH0181022U (en) | ||
JPS6425220U (en) | ||
JPS6323821U (en) | ||
JPS6333257U (en) | ||
JPH0197612U (en) | ||
JPS61126627U (en) | ||
JPS643210U (en) |