JPS635718U - - Google Patents

Info

Publication number
JPS635718U
JPS635718U JP9815286U JP9815286U JPS635718U JP S635718 U JPS635718 U JP S635718U JP 9815286 U JP9815286 U JP 9815286U JP 9815286 U JP9815286 U JP 9815286U JP S635718 U JPS635718 U JP S635718U
Authority
JP
Japan
Prior art keywords
circuit
series
passed
gain
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9815286U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9815286U priority Critical patent/JPS635718U/ja
Publication of JPS635718U publication Critical patent/JPS635718U/ja
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の利得制御回路の回
路図、第2図は本考案の他の実施例の回路図、第
3図は本考案の更に他の実施例の回路図、第4図
は本考案の更に他の実施例の回路図、第5図は本
考案の更にまた他の実施例の回路図、第6図は制
御電流比と利得の特性図である。 (符号の説明)、1,2,3,4,5……利得
制御回路、Q,Q,Q,Q……トランジ
スタ、D,D……ダイオード、R,R
…抵抗、V……バイアス電圧、A,B……電流
調整回路、S……信号源、I……入力電流信号
、I……出力電流信号。
FIG. 1 is a circuit diagram of a gain control circuit according to one embodiment of the present invention, FIG. 2 is a circuit diagram of another embodiment of the present invention, and FIG. 3 is a circuit diagram of still another embodiment of the present invention. FIG. 4 is a circuit diagram of still another embodiment of the present invention, FIG. 5 is a circuit diagram of still another embodiment of the present invention, and FIG. 6 is a characteristic diagram of control current ratio and gain. (Explanation of symbols), 1, 2, 3, 4, 5...Gain control circuit, Q1 , Q2 , Q3 , Q4 ...Transistor, D1 , D2 ...Diode, R1 , R2
...resistance, V b ... bias voltage, A, B ... current adjustment circuit, S ... signal source, I s ... input current signal, I o ... output current signal.

Claims (1)

【実用新案登録請求の範囲】 一対のトランジスタのエミツタ同士が結合され
、そのエミツタ側から入力信号が印加され、コレ
クタ側に出力される回路において、 各々のトランジスタのベースにダイオード手段
と抵抗手段を直列接続した直列回路をそれぞれ接
続し、かつそれら直列回路を同一バイアス点に接
続し、一方の直列回路には基準電流を流し、他方
の直列回路には制御電流を流し、前記基準電流と
制御電流の比の調節によつて回路利得を制御する
ことを特徴とする利得制御回路。
[Claims for Utility Model Registration] In a circuit in which the emitters of a pair of transistors are coupled to each other, an input signal is applied from the emitter side and output to the collector side, a diode means and a resistor means are connected in series to the base of each transistor. The connected series circuits are connected respectively, and the series circuits are connected to the same bias point, a reference current is passed through one series circuit, a control current is passed through the other series circuit, and the difference between the reference current and the control current is A gain control circuit characterized in that the circuit gain is controlled by adjusting the ratio.
JP9815286U 1986-06-26 1986-06-26 Pending JPS635718U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9815286U JPS635718U (en) 1986-06-26 1986-06-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9815286U JPS635718U (en) 1986-06-26 1986-06-26

Publications (1)

Publication Number Publication Date
JPS635718U true JPS635718U (en) 1988-01-14

Family

ID=30965826

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9815286U Pending JPS635718U (en) 1986-06-26 1986-06-26

Country Status (1)

Country Link
JP (1) JPS635718U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0483337U (en) * 1990-11-30 1992-07-20
JP2006197227A (en) * 2005-01-13 2006-07-27 Renesas Technology Corp Variable gain amplifier circuit, receiver, and transmitter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0483337U (en) * 1990-11-30 1992-07-20
JP2006197227A (en) * 2005-01-13 2006-07-27 Renesas Technology Corp Variable gain amplifier circuit, receiver, and transmitter

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