JPS5826214U - Gain control amplifier balance adjustment circuit - Google Patents

Gain control amplifier balance adjustment circuit

Info

Publication number
JPS5826214U
JPS5826214U JP12091281U JP12091281U JPS5826214U JP S5826214 U JPS5826214 U JP S5826214U JP 12091281 U JP12091281 U JP 12091281U JP 12091281 U JP12091281 U JP 12091281U JP S5826214 U JPS5826214 U JP S5826214U
Authority
JP
Japan
Prior art keywords
transistor
gain control
adjustment circuit
control amplifier
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12091281U
Other languages
Japanese (ja)
Other versions
JPH0233387Y2 (en
Inventor
健司 横山
Original Assignee
ヤマハ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ヤマハ株式会社 filed Critical ヤマハ株式会社
Priority to JP12091281U priority Critical patent/JPS5826214U/en
Publication of JPS5826214U publication Critical patent/JPS5826214U/en
Application granted granted Critical
Publication of JPH0233387Y2 publication Critical patent/JPH0233387Y2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の利得制御増幅器の一構成例を示す回路図
、第2図はこの考案の第1の実施例を具備する利得制御
増幅器の一構成例を示す回路図、第3図および第4図は
同側の動作を説明するための特性図、第5図はこの考案
の第2の実施例を具備する利得制御増幅器の構成を示す
回路図、第6図はこの考案の第1の実施例を具備する利
得制御増幅器の他の構成例を示す回路図である。 1、 2. 4. 5・・・トランジスタ、3,6・・
・トランジスタペア、18・・・ベース電圧調整回路、
19・・・ベース電流調整回路。
FIG. 1 is a circuit diagram showing an example of the configuration of a conventional gain control amplifier, FIG. 2 is a circuit diagram showing an example of the configuration of a gain control amplifier equipped with the first embodiment of the present invention, and FIGS. Figure 4 is a characteristic diagram for explaining the operation of the ipsilateral side, Figure 5 is a circuit diagram showing the configuration of a gain control amplifier equipped with the second embodiment of this invention, and Figure 6 is the first embodiment of this invention. FIG. 7 is a circuit diagram showing another configuration example of the gain control amplifier including the embodiment. 1, 2. 4. 5...Transistor, 3,6...
・Transistor pair, 18...base voltage adjustment circuit,
19...Base current adjustment circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ベース間に制御電圧が印加され、かつエミッタが共通接
続されたトランジスタペアを2組設けてなす、前記2組
のトランジスタペアの各共通エミッタに互いに逆位相の
入力信号を供給すると共に前記2組のトランジスタペア
における所定のコレクタから出力信号を得るようにした
利得制御増幅器において、前記各トランジスタペアにお
ける一方のトランジスタのベースと接地点との間に介挿
され、これらの各ベースにおけるベース電流をバランス
させる電流調整回路と、前記各トランジスタペアにおけ
る他方のトランジスタのベースと制御電圧入力端子との
間に介挿され、これらの各ベースとこれらの各ベースに
対応するエミッタとの間のベース・エミッタ間電圧をバ
ランスさせるベース電圧調整回路とを具備してなること
を特徴とする利得制御増幅器のバランス調整回路。
A control voltage is applied between the bases, and two transistor pairs are provided whose emitters are commonly connected. Input signals having mutually opposite phases are supplied to the common emitters of the two transistor pairs, and the two transistor pairs are connected in common. In a gain control amplifier configured to obtain an output signal from a predetermined collector in a transistor pair, the gain control amplifier is inserted between the base of one transistor in each transistor pair and a ground point, and balances the base currents in each of these bases. A current adjustment circuit is inserted between the base of the other transistor in each transistor pair and the control voltage input terminal, and the base-emitter voltage between each of these bases and the emitter corresponding to each of these bases is A balance adjustment circuit for a gain control amplifier, comprising: a base voltage adjustment circuit for balancing;
JP12091281U 1981-08-14 1981-08-14 Gain control amplifier balance adjustment circuit Granted JPS5826214U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12091281U JPS5826214U (en) 1981-08-14 1981-08-14 Gain control amplifier balance adjustment circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12091281U JPS5826214U (en) 1981-08-14 1981-08-14 Gain control amplifier balance adjustment circuit

Publications (2)

Publication Number Publication Date
JPS5826214U true JPS5826214U (en) 1983-02-19
JPH0233387Y2 JPH0233387Y2 (en) 1990-09-07

Family

ID=29914871

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12091281U Granted JPS5826214U (en) 1981-08-14 1981-08-14 Gain control amplifier balance adjustment circuit

Country Status (1)

Country Link
JP (1) JPS5826214U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020005019A (en) * 2018-06-25 2020-01-09 ヤマハ株式会社 Power amplification device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020005019A (en) * 2018-06-25 2020-01-09 ヤマハ株式会社 Power amplification device

Also Published As

Publication number Publication date
JPH0233387Y2 (en) 1990-09-07

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