JPH0320520U - - Google Patents

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Publication number
JPH0320520U
JPH0320520U JP7953189U JP7953189U JPH0320520U JP H0320520 U JPH0320520 U JP H0320520U JP 7953189 U JP7953189 U JP 7953189U JP 7953189 U JP7953189 U JP 7953189U JP H0320520 U JPH0320520 U JP H0320520U
Authority
JP
Japan
Prior art keywords
transistors
load
collector
transistor
differential amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7953189U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7953189U priority Critical patent/JPH0320520U/ja
Publication of JPH0320520U publication Critical patent/JPH0320520U/ja
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案による差動増幅回路の一実施例
を示す回路図、第2図及び第3図は従来の差動増
幅回路の例をそれぞれ示す回路図である。 Q,Q……第1、第2のトランジスタ(差
動構成の一対のトランジスタ)、Q……第3の
トランジスタ、1……負荷(カレントミラー回路
)、2……定電流源。
FIG. 1 is a circuit diagram showing an embodiment of a differential amplifier circuit according to the present invention, and FIGS. 2 and 3 are circuit diagrams showing examples of conventional differential amplifier circuits. Q 1 , Q 2 . . . first and second transistors (a pair of transistors in a differential configuration), Q 3 . . . third transistor, 1 . . . load (current mirror circuit), 2 .

Claims (1)

【実用新案登録請求の範囲】 差動構成の第1及び第2のトランジスタと、 該第1及び第2のトランジスタのコレクタに接
続した負荷と、 前記第1及び第2のトランジスタのうちの出力
信号を導出する一方のトランジスタのコレクタと
前記負荷との接続点にベースが接続され、前記第
1及び第2のトランジスタのうちの他のトランジ
スタのコレクタと前記負荷との間にエミツタ・コ
レクタ路が接続された第3のトランジスタとを備
える、 ことを特徴とする差動増幅回路。
[Claims for Utility Model Registration] First and second transistors having a differential configuration, a load connected to the collectors of the first and second transistors, and an output signal of the first and second transistors. A base is connected to a connection point between the collector of one of the transistors and the load, and an emitter-collector path is connected between the collector of the other one of the first and second transistors and the load. A differential amplifier circuit comprising a third transistor.
JP7953189U 1989-07-07 1989-07-07 Pending JPH0320520U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7953189U JPH0320520U (en) 1989-07-07 1989-07-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7953189U JPH0320520U (en) 1989-07-07 1989-07-07

Publications (1)

Publication Number Publication Date
JPH0320520U true JPH0320520U (en) 1991-02-28

Family

ID=31623769

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7953189U Pending JPH0320520U (en) 1989-07-07 1989-07-07

Country Status (1)

Country Link
JP (1) JPH0320520U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0560012A (en) * 1991-08-26 1993-03-09 Ngk Insulators Ltd Ceramic metal composite piston and its manufacture

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59100607A (en) * 1982-11-30 1984-06-09 Mitsubishi Electric Corp Differential amplifier

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59100607A (en) * 1982-11-30 1984-06-09 Mitsubishi Electric Corp Differential amplifier

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0560012A (en) * 1991-08-26 1993-03-09 Ngk Insulators Ltd Ceramic metal composite piston and its manufacture

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